cy28351-400 SpectraLinear Inc, cy28351-400 Datasheet - Page 3

• Manufacturer Part Number: cy28351-400
• Description: Differential Clock Buffer/driver
• Manufacturer: SpectraLinear Inc

Rev 1.0, November 28, 2006
Power Management
The
CY28351-400 allows the user to implement unique power
management schemes into the design. Outputs are
three-stated when disabled through the two-line interface as
individual bits are set LOW in Byte0 and Byte1 registers. The
feedback output (FBOUT) cannot be disabled via two line
serial bus. The enabling and disabling of individual outputs is
done in such a manner as to eliminate the possibility of partial
“runt” clocks.
Byte0: Output Register 1 (1 = Enable, 0 = Disable)
Byte1: Output Register 2 (1 = Enable, 0 = Disable)
Byte2: Test Register 3
individual
Bit
Bit
Bit
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
output
enable/disable
@Pup
@Pup
@Pup
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
control
of
the
20, 19
22, 23
46, 47
44, 43
39, 40
29, 30
27, 26
10, 9
Pin#
Pin#
Pin#
3, 2
5, 6
Serial Control Registers
Following the acknowledge of the Address Byte, two additional
bytes must be sent:
–
–
–
–
–
–
–
–
–
–
–
–
–
–
• Command Code byte
• Byte Count byte.
0 = PLL leakage test, 1 = disable test
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
YT0, YC0
YT1, YC1
YT2, YC2
YT3, YC3
YT4, YC4
YT5, YC5
YT6, YC6
YT7, YC7
YT8, YC8
YT9, YC9
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Description
Description
Description
CY28351-400
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