74LCXH16374MTDX Fairchild Semiconductor, 74LCXH16374MTDX Datasheet

IC FLIP FLOP 16BIT D LV 48TSSOP

74LCXH16374MTDX

Manufacturer Part Number
74LCXH16374MTDX
Description
IC FLIP FLOP 16BIT D LV 48TSSOP
Manufacturer
Fairchild Semiconductor
Series
74LCXHr
Type
D-Type Busr
Datasheet

Specifications of 74LCXH16374MTDX

Function
Standard
Output Type
Tri-State Non Inverted
Number Of Elements
2
Number Of Bits Per Element
8
Frequency - Clock
170MHz
Delay Time - Propagation
6.2ns
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LCXH16374MTDX
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
© 2005 Fairchild Semiconductor Corporation
74LCXH16374G
(Note 1)(Note 3)
74LCXH16374MEA
(Note 2)
74LCXH16374MTD
(Note 2)
74LCXH16374
Low Voltage 16-Bit D-Type Flip-Flop with Bushold
General Description
The LCXH16374 contains sixteen non-inverting D-type flip-
flops with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. A buffered clock
(CP) and Output Enable (OE) are common to each byte
and can be shorted together for full 16-bit operation.
The LCXH16374 is designed for low voltage (2.5V or 3.3V)
V
The LCXH16374 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
The LCXH16374 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
Ordering Code:
Note 1: Ordering code “G” indicates Trays.
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
GTO
CC
Order Number
¥
applications.
is a trademark of Fairchild Semiconductor Corporation.
Package Number
BGA54A
MS48A
MTD48
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
DS500441
Features
5V tolerant control inputs and outputs
2.3V–3.6V V
6.2 ns t
Bushold on inputs eliminating the need for external
pull-up/pull-down resistors
Power down high impedance outputs
r
Implements patented noise/EMI reduction circuitry
Latch-up performance exceeds 500 mA
ESD performance:
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
24 mA output drive (V
Human body model
Machine model
Package Description
PD
max (V
CC
specifications provided
CC
!
200V
!
3.3V), 20
CC
2000V
3.0V)
February 2001
Revised June 2005
P
A I
CC
www.fairchildsemi.com
max

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74LCXH16374MTDX Summary of contents

Page 1

... Note 1: Ordering code “G” indicates Trays. Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol ¥ GTO is a trademark of Fairchild Semiconductor Corporation. © 2005 Fairchild Semiconductor Corporation Features 5V tolerant control inputs and outputs 2.3V–3.6V V ...

Page 2

Connection Diagrams Pin Assignment for SSOP and TSSOP Pin Assignment for FBGA (Top Thru View) www.fairchildsemi.com Pin Descriptions Pin Names Description OE Output Enable Input (Active LOW Clock Pulse Input n I –I Bushold Inputs ...

Page 3

Functional Description The LCXH16374 consists of sixteen edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The device is byte controlled with each byte func- tioning identically, but independent of the other. The control pins can be shorted together ...

Page 4

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Source/Sink Current Supply ...

Page 5

DC Electrical Characteristics Symbol Parameter I Bushold Input Minimum I(HOLD) Drive Hold Current I Bushold Input Over-Drive I(OD) Current to Change State I 3-STATE Output Leakage OZ I Power-Off Leakage Current OFF I Quiescent Supply Current Increase ...

Page 6

AC LOADING and WAVEFORMS FIGURE 1. AC Test Circuit (C Test t PLH t PZL t PZH Waveform for Inverting and Non-Inverting Functions Propagation Delay. Pulse Width and t rec 3-STATE Output Low Enable and Disable Times for Logic (Input ...

Page 7

Schematic Diagram Generic for LCXH Family (with Bushold) 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide www.fairchildsemi.com Package Number BGA54A 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide Package Number MS48A 9 www.fairchildsemi.com ...

Page 10

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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