upd63a Renesas Electronics Corporation., upd63a Datasheet
upd63a
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SINGLE-CHIP MICROCONTROLLER FOR INFRARED REMOTE CONTROL TRANSMISSION DESCRIPTION Equipped with low-voltage 1.8 V operation, a carrier generation circuit for infrared remote control transmission, a standby release function through key entry, and a programmable timer, the PD63, 63A, and 64 ...
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ORDERING INFORMATION Part Number PD63GS- 20-pin plastic SOP (300 mil) PD63AGS- 20-pin plastic SOP (300 mil) PD64GS- 20-pin plastic SOP (300 mil) PD64MC- -5A4 20-pin plastic SSOP (300 mil) Remark indicates ROM code suffix. PIN CONFIGURATION (TOP VIEW) 20-pin Plastic ...
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BLOCK DIAGRAM CARRIER REM GENERATOR 9-bit S /LED 1 TIMER LIST OF FUNCTIONS Item ROM capacity 512 Mask ROM RAM capacity 32 4 bits Stack 1 level (multiplexed with RF of RAM) I/O pins • Key input (K • Key ...
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PIN FUNCTIONS ......................................................................................................................... 1.1 List of Pin Functions ......................................................................................................................... 1.2 INPUT/OUTPUT Circuits of Pins ...................................................................................................... 1.3 Dealing with Unused Pins ................................................................................................................ 2. INTERNAL CPU FUNCTIONS .................................................................................................... 2.1 Program Counter (PC) ...................................................................................................................... 2.2 Stack Pointer (SP) ............................................................................................................................. 2.3 Address Stack ...
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INSTRUCTION SET .................................................................................................................... 30 9.1 Machine Language Output by Assembler ....................................................................................... 30 9.2 Circuit Symbol Description .............................................................................................................. 31 9.3 Mnemonic to/from Machine Language (Assembler Output) Contrast Table ............................... 32 9.4 Accumulator Operation Instructions ............................................................................................... 36 9.5 Input/Output Instructions ................................................................................................................. ...
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PIN FUNCTIONS 1.1 List of Pin Functions Pin No. Symbol These pins refer to the 8-bit I/O ports. I/O switching can I/O0 I/ made in 8-bit units. 15-20 In INPUT mode, a pull-down resistor ...
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INPUT/OUTPUT Circuits of Pins The input/output circuits of the PD63 pins are shown in partially simplified forms below. ( I/O0 I/O7 Output data latch output disable Input buffer Note The drive capability is held low. (2) K ...
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Dealing with Unused Pins The following connections are recommended for unused pins. Table 1-1. Connections for Unused Pins Pin K INPUT mode I/O OUTPUT mode REM S /LED Note RESET Note If the circuit ...
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INTERNAL CPU FUNCTIONS 2.1 Program Counter (PC): 10 Bits Refers to the binary counter that holds the address information of the program memory. Figure 2-1. Program Counter Organization PC PC9 PC8 The program counter contains the address of the ...
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Program Memory (ROM): 512 steps 768 steps 1002 steps The ROM consists of 10 bits per step, and is addressed by the program counter. The program memory stores programs and table data, etc. The 22 steps from 3EAH to ...
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Figure 2-4. Data Memory Organization R (high-order 4 bits ...
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Arithmetic and Logic Unit (ALU): 4 Bits The arithmetic and logic unit (ALU), which refers to an arithmetic circuit consisting of 4 bits, executes simple manipulations with priority given to logical operations. 2.9 Flags 2.9.1 Status flag (F) Pin ...
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Carry flag (CY) The carry flag is set ( the following cases: • If the ANL instruction or the XRL instruction is executed when bit 3 of the accumulator is “1” and bit 3 of the operand ...
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PORT REGISTERS (PX) The K port, the K port, the special ports (S I reset, port register values are shown below. Figure 3-1. Port Register Organization I/O7 I/O6 I/ ...
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K Port (P0) I/O The K port is an 8-bit input/output port for key scan output. I/O INPUT/OUTPUT mode is set by bit 1 of the P4 register read instruction is executed, the pin state can be ...
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K Port/Special Ports (P1) I 3.2.1 K port (P : bits 4 The K port is to the 4-bit input port for key entry. I The pin state can be read. Software can be used ...
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Control Register 0 (P3) Control register 0 consists of 8 bits. The contents that can be controlled are as shown below. When reset, the register becomes 0000 0011B. Table 3-4. Control Register 0 (P3) Bit b 7 Name — ...
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Control Register 1 (P4) Control register 1 consists of 8 bits. The contents that can be controlled are as shown below. When reset, the register becomes 0010 0110B. Table 3-6. Control Register 1 (P4) Bit b 7 Name — ...
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TIMER 4.1 Timer Configuration The timer is the block used for creating a remote control transmission pattern. As shown in Figure 4-1, it consists of a 9-bit down counter ( flag ( ...
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Timer Operation The timer starts (counting down) when a value other than 0 is set for the down counter with a timer operation instruction. The timer operation instructions for making the timer start operation are shown below: MOV T0, ...
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Carrier Output The carrier for remote-controlled transmission can be output from the REM pin by clearing (to 0) bit 2 of the control register 0. As shown in Figure 4-3, in the case where the timer stops when the ...
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STANDBY FUNCTION 5.1 Outline of Standby Function To save current consumption, two types of standby modes, i.e., HALT mode and STOP mode, are made available. In STOP mode, the system clock stops oscillation. At this time, the X In ...
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Standby Mode Setup and Release The standby mode is set with the HALT #b standby mode to be set, the status flag (F) is required to have been cleared (to 0). The standby mode is released by the release ...
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Table 5-3. Standby Mode Setup (HALT #b Operand Value of HALT Instruction Setting Mode STOP STOP Note STOP 1 Any of ...
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Figure 5-2. STOP Mode Release by RESET Input HALT instruction (STOP mode) RESET OPERATING mode Oscillation Clock (2) HALT Mode Release Timing Figure 5-3. HALT Mode Release by Cancelation Condition HALT instruction (HALT mode) Standby release signal OPERATING mode Clock ...
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RESET PIN The system reset takes effect by inputting low level to the RESET pin. While the RESET pin is at low level, the system clock oscillation circuit is stopped and the X are fixed to the GND. If ...
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POC CIRCUIT (MASK OPTION) The POC circuit monitors the power supply voltage and applies an internal reset in the microcontroller at the time of battery replacement. If the applied circuit satisfies the following conditions, the POC circuit can be ...
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Functions of POC Circuit The POC circuit has the following functions: • Generates an internal reset signal when V • Cancels an internal reset signal when V Here power supply voltage POC V DD 3.6 ...
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SYSTEM CLOCK OSCILLATION CIRCUIT The system clock oscillation circuit consists of oscillation circuits for ceramic resonators (f Ceramic resonator The system clock oscillation circuit stops its oscillation when reset or in STOP mode. Caution When using the system clock ...
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INSTRUCTION SET 9.1 Machine Language Output by Assembler The bit length of the machine language of this product is 10 bits per word. However, the machine language that is output by the assembler is extended to 16 bits per ...
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Circuit Symbol Description A : Accumulator ASR : Address Stack Register addr : Program memory address CY : Carry flag data4 : 4-bit immediate data data8 : 8-bit immediate data data10 : 10-bit immediate data F : Status flag ...
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Mnemonic to/from Machine Language (Assembler Output) Contrast Table Accumulator Operation Instructions Instruction Code Mnemonic Operand 1st Word 2nd Word ANL A, R0n FBEn A, R1n FAEn A, @R0H FAF0 A, @R0L FBF0 A, #data4 FBF1 data4 ORL A, R0n ...
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Input/output Instructions Instruction Code Mnemonic Operand 1st Word 2nd Word IN A, P0n FFF8 + n — A, P1n FEF8 + n — OUT P0n, A E5F8 + n — P1n, A E4F8 + n — ANL A, P0n FBF8 ...
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Branch Instructions Instruction Code Mnemonic Operand 1st Word 2nd Word JMP addr (Page 0) E8F1 addr addr (Page 1) E9F1 addr JC addr (Page 0) ECF1 addr addr (Page 1) EAF1 addr JNC addr (Page 0) EDF1 addr addr (Page ...
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Others Instruction Code Mnemonic Operand 1st Word 2nd Word HALT #data4 E2F1 data4 STTS #data4 E3F1 data4 R0n E3En SCAF FAF3 NOP E0E0 Operation 3rd Word Standby mode if statuses match F 1 else statuses match F ...
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Accumulator Operation Instructions ANL A, R0n ANL A, R1n <1> Instruction code : <2> Cycle count : 1 <3> Function : (A) CY The accumulator contents and the register Rmn contents are ANDed and ...
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ORL A, R0n ORL A, R1n <1> Instruction code : <2> Cycle count : 1 <3> Function : (A) ( The accumulator contents and the register Rmn contents are ORed and the results ...
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XRL A, @R0H XRL A, @R0L <1> Instruction code : 0 <2> Cycle count : 1 <3> Function : (A) CY (A) CY The accumulator contents and the program memory contents ...
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Input/Output Instructions IN A, P0n IN A, P1n <1> Instruction code : <2> Cycle count : 1 <3> Function : (A) (Pmn ...
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OUT Pn, #data8 <1> Instruction code : <2> Cycle count : 1 <3> Function : (Pn) The immediate data is transferred to port Pn. In this ...
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MOV R0n, A MOV R1n, A <1> Instruction code : <2> Cycle count : 1 <3> Function : (Rmn) The accumulator contents are transferred to register Rmn. MOV Rn, #data8 <1> Instruction code : 0 ...
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Branch Instructions The program memory consists of pages in steps of 1K (000H to 3FFH). However, as the assembler automatically performs page optimization unnecessary to designate pages. The pages allowed for each product are as follows. PD63 ...
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Subroutine Instructions The program memory consists of pages in steps of 1K (000H to 3FFH). However, as the assembler automatically performs page optimization unnecessary to designate pages. The pages allowed for each product are as follows. PD63 ...
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Timer Operation Instructions MOV A, T0 MOV A, T1 <1> Instruction code : 0 <2> Cycle count : 1 <3> Function : (A) CY The timer Tn contents are transferred ...
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MOV T, @R0 <1> Instruction code : <2> Cycle count : 1 <3> Function : (T) ((P13), (R0)) Transfers the program memory contents to the timer register T (t P13 ...
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STTS #data4 <1> Instruction code : <2> Cycle count : 1 <3> Function : if statuses match F else F Compares the ...
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ASSEMBLER RESERVED WORDS 10.1 Mask Option Directives When creating the PD63 program necessary to use a mask option directive in the assembler’s source program to specify a mask option. 10.1.1 OPTION and ENDOP directives From the OPTION ...
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ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (T = +25 ˚C) A Parameter Symbol Power supply voltage V DD Input voltage I/O Output voltage V O Note High-level output current I REM OH LED One K Total of ...
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DC Characteristics (T = –40 to +85 ˚ Parameter Symbol High-level input voltage V RESET IH1 V K IH2 I IH3 I Low-level input voltage V RESET IL1 V K IL2 I ...
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AC Characteristics (T = –40 to +85 ˚ Parameter Symbol Command execution time 2 high-level width When releasing STANDBY mode ...
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System Clock Oscillation Circuit Characteristics (T Parameter Symbol Oscillator frequency f X (ceramic resonator 2 Recommended Ceramic Resonator (T Manufacturer Part Number (Order Disregarded) TDK Corp. FCR3.64MC5 FCR3.84MC5 FCR4.0MC5 FCR6.0MC5 CCR3.2MC3 CCR4.0MC3 CCR6.0MC3 CCR8.0MC5 ...
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Recommended Ceramic Resonator (T Manufacturer Part Number (Order Disregarded) Kyocera Corp. KBR-2.5MS KBR-3.58MSB KBR-3.58MKC KBR-4.0MSB KBR-4.0MKC KBR-6.0MSB KBR-6.0MKC KBR-8.0M PBRC3.58A PBRC3.58B PBRC4.00A PBRC4.00B PBRC6.00A PBRC6.00B Note When a POC circuit (mask option) is not incorporated An external circuit example 52 ...
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CHARACTERISTIC CURVE (REFERENCE VALUES MHz 1.8 1.6 1.4 1.2 1.0 OPERATING mode 0.8 0.6 HALT mode 0 Power supply voltage ...
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I ° 3 320 280 240 200 160 120 80 40 0.6 1.2 1.8 2.4 0 Low-level output voltage V [ ...
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APPLIED CIRCUIT EXAMPLE Example of Application to System · Remote-control transmitter (40 keys; mode selection switch accommodated) K I/ /LED 1 REM OUT X IN GND RESET · Remote-control ...
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PACKAGE DRAWINGS 20 PIN PLASTIC SOP (300 mil NOTE Each lead centerline is located within 0.12 mm (0.005 inch) of its true position (T.P.) at maximum material condition. Remark ...
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PIN PLASTIC SSOP (300 mil NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition. Remark The dimensions and materials of the ES model ...
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RECOMMENDED SOLDERING CONDITIONS Carry out the soldered packaging of this product under the following recommended conditions. For details of the soldering conditions, refer to information material Semiconductor Device Mounting Technology Manual (C10535E). For soldering methods and conditions other than ...
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APPENDIX A. DEVELOPMENT TOOLS An emulator is provided for the PD63, 63A, and 64. Hardware Note • Emulator (EB-6133 ) It is used to emulate the PD63, 63A, and 64. Note This is a product of Naito Densei Machida Mfg. ...
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APPENDIX B. FUNCTIONAL COMPARISON BETWEEN PD63 SUBSERIES AND OTHER SUBSERIES Item PD63 ROM capacity 512 10 bits RAM capacity 32 4 bits Stack 1 level (multiplexed with RF of RAM) Key matrix keys S (S-IN) input ...
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APPENDIX C. EXAMPLE OF REMOTE-CONTROL TRANSMISSION FORMAT (in the case of NEC transmission format in command one-shot transmission mode) Caution When using the NEC transmission format, please apply for a custom code at NEC. (1) REM output waveform (From <2> ...
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Carrier waveform (Enlarged waveform of each code’s high period) REM output 8.77 s (6) Bit array of each code Leader code Custom code Caution To prevent malfunction ...
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PD63, 63A ...
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PD63, 63A, 64 ...
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PD63, 63A ...
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NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation ...
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Regional Information Some information contained in this document may vary from country to country. Before using any NEC product in your application, please contact the NEC office in your country to obtain a list of authorized representatives and distributors. They ...
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MS-DOS is either a registered trademark or a trademark of Microsoft Corporation in the United States and/or other countries. PC/AT and PC DOS are trademarks of IBM Corp. The export of this product from Japan is regulated by the Japanese ...