upd70f3402 Renesas Electronics Corporation., upd70f3402 Datasheet - Page 315

• Manufacturer Part Number: upd70f3402
• Description: 32-/16-bit Single-chip Microcontroller With Can Interface
• Manufacturer: Renesas Electronics Corporation.

TQ0IOC1 TQ0IS7 TQ0IS6 TQ0IS5 TQ0IS4 TQ0IS3 TQ0IS2 TQ0IS1 TQ0IS0 FFFFF593H R/W
TQ1IOC1 TQ1IS7 TQ1IS6 TQ1IS5 TQ1IS4 TQ1IS3 TQ1IS2 TQ1IS1 TQ1IS0 FFFFF613H R/W
(4)
Symbol
Symbol
Cautions: 1. Rewrite bits TQnIS3 to TQnIS0 when TQnCE = 0. (The same value can be written
Remark:
Timer Q dedicated I/O control register 1 (TQnIOC1)
The TQnIOC1 register is an 8-bit register that controls the valid edge of the external input signals
(TIQn0 to TIQn3).
This register can be read or written in 8-bit or 1-bit units.
RESET input clears this register to 00H.
TQnIS7
TQnIS5
TQnIS3
TQnIS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
7
7
2. The TQnIS7 to TQnIS0 bits are valid only in the free-running mode and pulse
n = 0, 1
Figure 8-10: Timer Q Dedicated I/O Control Register 1 (TQnIOC1) Format
when TQnCE = 1.) If rewriting was mistakenly performed, set TQnCE = 0 and then
set the bits again.
width measurement mode. A capture operation is not performed in any other
mode.
TQnIS6
TQnIS4
TQnIS2
TQnIS0
6
6
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
5
5
Chapter 8 16-Bit Timer/Event Counter Q
Detect no edge (capture operation is invalid).
Detect rising edge.
Detection of falling edge
Detection of both edges
No edge detection
Detection of rising edge
Detection of falling edge
Detection of both edges
No edge detection
Detection of rising edge
Detection of falling edge
Detection of both edges
No edge detection
Detection of rising edge
Detection of falling edge
Detection of both edges
User’s Manual U16702EE3V2UD00
4
4
3
3
Capture input (TIQn3) valid edge setting
Capture input (TIQn2) valid edge setting
Capture input (TIQn1) valid edge setting
Capture input (TIQn0) valid edge setting
2
2
1
1
0
0
Address
Address
R/W After reset
R/W After reset
00H
00H
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