74HC109D,653 NXP Semiconductors, 74HC109D,653 Datasheet - Page 4

IC DUAL JK F-F POS-EDGE 16-SOIC

74HC109D,653

Manufacturer Part Number
74HC109D,653
Description
IC DUAL JK F-F POS-EDGE 16-SOIC
Manufacturer
NXP Semiconductors
Series
74HCr
Type
JK Typer
Datasheet

Specifications of 74HC109D,653

Output Type
Differential
Package / Case
16-SOIC (3.9mm Width)
Function
Set(Preset) and Reset
Number Of Elements
2
Number Of Bits Per Element
1
Frequency - Clock
81MHz
Delay Time - Propagation
9ns
Trigger Type
Positive Edge
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
2
Logic Family
HC
Logic Type
J-K Positive Edge Triggered Flip Flop
Polarity
Inverting/Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
15 ns at 5 V
High Level Output Current
- 5.2 mA
Low Level Output Current
5.2 mA
Supply Voltage (max)
6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
2 V
Technology
CMOS
Number Of Bits
2
Number Of Elements
2
Clock-edge Trigger Type
Positive-Edge
Operating Supply Voltage (typ)
5V
Package Type
SOIC W
Frequency (max)
24MHz
Operating Supply Voltage (min)
2V
Operating Supply Voltage (max)
6V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output High, Low
-
Lead Free Status / Rohs Status
Compliant
Other names
74HC109D-T
74HC109D-T
933714480653
Philips Semiconductors
PACKAGE OUTLINES
See
1997 Nov 25
handbook, full pagewidth
Fig.4 Functional diagram.
Dual JK flip-flop with set and reset;
positive-edge trigger
“74HC/HCT/HCU/HCMOS Logic Package Outlines”
CP
R
K
S
J
Fig.5 Logic diagram (one flip-flop).
FUNCTION TABLE
Notes
1. H = HIGH voltage level
asynchronous set
asynchronous reset
undetermined
toggle
load “0” (reset)
load “1” (set)
hold “no change”
OPERATING
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition
L = LOW voltage level
I = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition
q = lower case letters indicate the state of the referenced output one set-up time
prior to the LOW-to-HIGH CP transition
X = don’t care
C
C
= LOW-to-HIGH CP transition
MODE
C
C
C
C
.
S
H
H
H
H
H
L
L
4
D
R
H
H
H
H
H
L
L
D
C
C
INPUTS
CP
X
X
X
C
C
X
X
X
J
h
h
l
l
MBK217
K
X
X
X
h
h
l
l
74HC/HCT109
Product specification
OUTPUTS
Q
H
H
H
L
q
L
q
Q
Q
Q
H
H
H
L
q
L
q

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