sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 513
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sc9s12hy64j0vllr
Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.SC9S12HY64J0VLLR.pdf
(792 pages)
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Chapter 15
32 KByte Flash Module (S12FTMRC32K1V1)
15.1
The FTMRC32K1 module implements the following:
The Flash memory is ideal for single-supply applications allowing for field reprogramming without
requiring external high voltage sources for program or erase operations. The Flash module includes a
memory controller that executes commands to modify Flash memory contents. The user interface to the
memory controller consists of the indexed Flash Common Command Object (FCCOB) register which is
written to with the command, global address, data, and any required command parameters. The memory
controller must complete the execution of a command before the FCCOB register can be written to with a
new command.
Freescale Semiconductor
Revision
Number
V01.11
V01.12
V01.13
•
•
32 Kbytes of P-Flash (Program Flash) memory
4 Kbytes of D-Flash (Data Flash) memory
Introduction
19 Dec 2008
25 Sep 2009
28 Jul 2008
Revision
Date
15.4.5.4/15-548
15.4.5.6/15-549
15.4.5.11/15-55
15.4.5.11/15-55
15.4.5.11/15-55
15.3.2.1/15-522
15.4.3.2/15-540
15.1.1/15-514
15.3.1/15-517
15.5.2/15-561
15.3.2/15-520
15.1/15-513
15.6/15-562
Sections
Affected
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
3
3
3
Table 15-1. Revision History
- Remove reference to IFRON in Program IFR definition
- Remove reference to IFRON in
- Clarify single bit fault correction for P-Flash phrase
- Add statement concerning code runaway when executing Read Once,
Program Once, and Verify Backdoor Access Key commands from Flash block
containing associated fields
- Relate Key 0 to associated Backdoor Comparison Key address
- Change “power down reset” to “reset”
- Reformat section on unsecuring MCU using BDM
The following changes were made to clarify module behavior related to Flash
register access during reset sequence and while Flash commands are active:
- Add caution concerning register writes while command is active
- Writes to FCLKDIV are allowed during reset sequence while CCIF is clear
- Add caution concerning register writes while command is active
- Writes to FCCOBIX, FCCOBHI, FCCOBLO registers are ignored during
reset sequence
Description of Changes
Table 15-4
and
Figure 15-3
513
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