sc9s12hy64j0vllr Freescale Semiconductor, Inc, sc9s12hy64j0vllr Datasheet - Page 740
sc9s12hy64j0vllr
Manufacturer Part Number
sc9s12hy64j0vllr
Description
S12 Microcontrollers Mcu 16-bit Hcs12 Cisc 32kb Flash 5v Tray
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.SC9S12HY64J0VLLR.pdf
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Electrical Characteristics
A.4
A.5
A.5.1
With each transition of the feedback clock, the deviation from the reference clock is measured and input
voltage to the VCO is adjusted accordingly.The adjustment is done continuously with no abrupt changes
in the VCOCLK frequency. Noise, voltage, temperature and other factors cause slight variations in the
control loop resulting in a clock jitter. This jitter affects the real minimum and maximum clock periods as
illustrated in
The relative deviation of t
number of clock periods (N).
Defining the jitter as:
For N < 100, the following equation is a good fit for the maximum jitter:
740
Reset, Oscillator,IRC,IVREG,IPLL
Phase Locked Loop
0
Jitter Definitions
Figure
t
min1
t
nom
t
max1
A-2.
1
nom
is at its maximum for one clock period, and decreases towards zero for larger
MC9S12HY/HA-Family Reference Manual, Rev. 1.04
J N
=
Figure A-2. Jitter Definitions
2
max 1
J N
–
t
t
---------------------- -
N t
minN
max
t
maxN
=
nom
------- -
N
3
j
1
N
,
1
–
---------------------- -
N t
t
min
nom
N
N-1
Freescale Semiconductor
N
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