74f114sc NXP Semiconductors, 74f114sc Datasheet - Page 6

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74f114sc

Manufacturer Part Number
74f114sc
Description
Dual J-k Negative Edge-triggered Flip-flop With Common Clock And Reset
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
TEST CIRCUIT AND WAVEFORMS
1996 Mar 14
Dual J-K negative edge-triggered flip-flop
with common clock and reset
DEFINITIONS:
R
C
R
T
L
L
GENERATOR
= Load resistor;
= Load capacitance includes jig and probe capacitance;
= Termination resistance should be equal to Z
PULSE
see AC ELECTRICAL CHARACTERISTICS for value.
see AC ELECTRICAL CHARACTERISTICS for value.
pulse generators.
Test Circuit for Totem-Pole Outputs
V
IN
R
T
D.U.T.
V
CC
V
OUT
C
L
R
L
OUT
of
NEGATIVE
PULSE
POSITIVE
PULSE
family
6
74F
90%
10%
amplitude
3.0V
V
INPUT PULSE REQUIREMENTS
V
M
90%
M
10%
t
t
TLH (
THL (
Input Pulse Definition
1.5V
V
M
t
t
r
f
)
)
rep. rate
1MHz
t
t
w
w
t
t
TLH (
THL (
500ns
t
t
r
f
t
10%
90%
)
)
w
V
V
M
M
2.5ns
t
TLH
Product specification
90%
10%
74F114
2.5ns
t
THL
AMP (V)
0V
0V
AMP (V)
SF00006

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