isl6341a Intersil Corporation, isl6341a Datasheet - Page 5

• Manufacturer Part Number: isl6341a
• Description: 5v Or 12v Single Synchronous Buck Pulse-width Modulation Pwm Controller
• Manufacturer: Intersil Corporation

Electrical Specifications
Functional Pin Description
VCC (Pin 6)
This pin provides the bias supply for the ISL6341, ISL6341A,
ISL6341B, as well as the lower MOSFET’s gate. An internal
regulator will supply bias as VCC rises above 5V, but the
LGATE/OCSET will still be sourced by VCC. Connect a
well-decoupled 5V to 12V supply to this pin.
FB (Pin 8)
This pin is the inverting input of the internal error amplifier. Use
FB, in combination with the COMP/EN pin, to compensate the
voltage-control feedback loop of the converter. A resistor divider
from V
VOS (Pin 9)
This input pin monitors the regulator output for OV and UV
protection, and PGOOD (OV and UV). Connect a resistor
divider from V
the FB resistor divider. It is usually not recommended to
share one divider for both FB and VOS; the response to a
fault may not be as quick or robust. There is a small pull-up
bias current on the pin; if the VOS pin is not connected, the
OV protection would be tripped to protect the load.
GND (Pin 5)
This pin represents the signal and power ground for the IC.
This pin is the high current connection, and should be tied to
the ground island/plane through the lowest impedance
connection available. The metal pad under the package
should also be connected to the GND plane for thermal
conductivity, but does not conduct any current.
PHASE (Pin 2)
Connect this pin to the source of the upper MOSFET, and
the drain of the lower MOSFET. It is used as the sink for the
Upper Gate Sink Impedance
Lower Gate Source Impedance
Lower Gate Sink Impedance
PROTECTION/DISABLE
OCSET Current Source
Enable Threshold (COMP/EN pin)
VOS Rising Trip (PGOOD OV; +10%)
VOS Rising Trip (PGOOD OV) hysteresis
VOS Falling Trip (PGOOD UV; -10%)
VOS Falling Trip (PGOOD UV) hysteresis
VOS Rising Threshold (OV; +25%)
VOS Falling Threshold (UV; -25%)
VOS Threshold (OV; 50% of V
VOS Bias Current
PGOOD
OUT
to FB to GND is used to set the regulation voltage.
PARAMETER
OUT
to VOS to GND, with the same ratio as
OUT
5
Test Conditions: V
)
R
R
SYMBOL
R
V
I
UG-SNKl
LG-SRCl
LG-SNKl
OCSET
ENABLE
ISL6341, ISL6341A, ISL6341B
CC
V
V
V
LGATE/OCSET = 0V
VOS = 0.25V
I
PGOOD
= 12V, T
CC
CC
CC
= 5V; I = 50mA
= 5V; I = 50mA
= 5V; I = 50mA
= 4mA
J
= 0 to +85°C, Unless Otherwise Noted. (Continued)
TEST CONDITIONS
UGATE driver, and to monitor the voltage drop across the
lower MOSFET for overcurrent protection. This pin is also
monitored by the adaptive shoot-through protection circuitry
to determine when the upper MOSFET has turned off.
UGATE (Pin 3)
Connect this pin to the gate of upper MOSFET; it provides
the PWM-controlled gate drive. It is also monitored by the
adaptive shoot-through protection circuitry to determine
when the upper MOSFET has turned off.
BOOT (Pin 1)
This pin provides ground referenced bias voltage to the upper
MOSFET driver. A bootstrap circuit is used to create a voltage
suitable to drive an N-Channel MOSFET (equal to V
the BOOT diode voltage drop), with respect to PHASE.
COMP/EN (Pin 7)
This is a multiplexed pin. During soft-start and normal converter
operation, this pin represents the output of the error amplifier.
Use COMP/EN, in combination with the FB pin, to compensate
the voltage-control feedback loop of the converter.
Pulling COMP/EN low (V
disable the controller, which causes the oscillator to stop, the
LGATE and UGATE outputs to be held low, and the soft-start
circuitry to re-arm. The external pull-down device will initially
need to overcome up to 5mA of COMP/EN output current.
However, once the IC is disabled, the COMP output will also
be disabled, so only a 20µA current source will continue to
draw current.
When the pull-down device is released, the COMP/EN pin will
start to rise, at a rate determined by the 20µA charging up the
capacitance on the COMP/EN pin. When the COMP/EN pin
rises above the V
ISL6341B will begin a new initialization and soft-start cycle.
ENABLE
0.683
0.868
0.980
0.380
-1500
0.708
0.580
0.10
MIN
ENABLE
9
trip point, the ISL6341, ISL6341A,
0.700
0.880
0.720
1.000
0.600
0.400
-250
TYP
0.18
= 0.7V nominal) will
1.7
1.5
1.1
10
16
16
0.717
0.888
0.732
1.020
0.620
0.410
MAX
-100
0.30
11
August 20, 2007
GD
UNITS
FN6538.0
mV
mV
μA
nA
minus
Ω
Ω
Ω
V
V
V
V
V
V
V