SST34WA3283 Silicon Storage Technology, Inc., SST34WA3283 Datasheet - Page 55

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SST34WA3283

Manufacturer Part Number
SST34WA3283
Description
32 Mbit Burst Mode Concurrent Superflash Combomemory 32 Mbit Burst Mode Concurrent Superflash Combomemory
Manufacturer
Silicon Storage Technology, Inc.
Datasheet
32 Mbit Burst Mode Concurrent SuperFlash ComboMemory
SST34WA32A3 / SST34WA32A4 / SST34WA3283 / SST34WA3284
©2007 Silicon Storage Technology, Inc.
FIGURE 26: PSRAM Read Burst Suspend
Note: 1. Non-default BCR settings for READ burst suspend: Fixed or Variable latency; latency code two
A/DQ
LBS#/UBS#
A
15
2. During Burst Read Suspend operations, the Clock signal must be stopped (Low). CLK must
3. OE# can stay LOW during burst suspend. If OE# is LOW. A/DQ[15:0] will continue to output
max
–A/DQ
(three clocks); WAIT active LOW; WAIT asserted during delay.
be static with no LOW-to-HIGH transitions during burst suspend.
valid data.
AVD#
BES#
WAIT
–A
WE#
OE#
CLK
16
0
Hi-Z
Hi-Z
Address
Address
Valid
Valid
T
T
OES
BACCS
T
T
T
T
T
T
CLK
SPS
T
T
SPS
SPS
BESS
SPS
T
BEWS
HDS
HDS
T
Output
Valid
OLZS
Output
Valid
T
55
BDHS
Output
Valid
T
T
OHZS
BEPS
T
CHLH
Output
Valid
T
OLZS
Note 2
Note 3
T
Output
HDS
Valid
T
T
BPHS
OES
Output
Valid
Output
Valid
1358 F27.0
Address
Hi-Z
Valid
Advance Information
T
T
BHZS
OHZS
S71358-01-000
11/07

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