SST34WA3283 Silicon Storage Technology, Inc., SST34WA3283 Datasheet - Page 63

• Manufacturer Part Number: SST34WA3283
• Description: 32 Mbit Burst Mode Concurrent Superflash Combomemory 32 Mbit Burst Mode Concurrent Superflash Combomemory
• Manufacturer: Silicon Storage Technology, Inc.

32 Mbit Burst Mode Concurrent SuperFlash ComboMemory
SST34WA32A3 / SST34WA32A4 / SST34WA3283 / SST34WA3284
©2007 Silicon Storage Technology, Inc.
FIGURE 35: PSRAM Burst Read Interrupted by Burst Read or Write
A/DQ
Notes: 1. Non-default BCR settings for burst READ interrupted by burst READ or WRITE: Fixed
2nd Cycle READ
2nd Cycle READ
2nd Cycle READ
LBS#/UBS#
A
15
max
–A/DQ
2. Burst interrupt shown on first allowable clock (i.e., after the first data received by
3. BES# can stay LOW between burst operations, but BES# must not remain LOW longer
AVD#
BES#
–A
WAIT
WE#
CLK
OE#
latency code two (three clocks); WAIT active LOW; WAIT asserted during delay.
controller).
than T
16
0
VIH
BEPS
High-Z
.
Address
Address
Valid
Valid
T
T
BACCS
OES
T
T
T
T
SPS
High-Z
SPS
SPS
BESS
T
T
T
CLK
HDS
HDS
A/DQ
T
BEWS
2nd Cycle WRITE
2nd Cycle WRITE
2nd Cycle WRITE
LBS#/UBS#
15
Output
Valid
–A/DQ
Address
OE#
63
Valid
T
T
BEPS
0
BDHS
READ Burst interrupted with new READ or
WRITE. See Note 2
VIH
T
T
T
High-Z
SPS
SPS
SPS
(Note 3)
T
T
T
T
High-Z
T
HDS
HDS
CWS
OHZS
SPS
Output
Valid
D[0]
Output
Valid
T
D[1]
T
BDHS
T
BACCS
HDS
Output
Valid
D[2]
Output
Valid
D[3]
1358 F36.0
High-Z
T
HDS
Advance Information
S71358-01-000
11/07