st92f124 STMicroelectronics, st92f124 Datasheet - Page 351
st92f124
Manufacturer Part Number
st92f124
Description
8/16-bit Single Voltage Flash Mcu Family With Ram, E3 Tmemulated Eeprom, Can 2.0b And J1850 Blpd
Manufacturer
STMicroelectronics
Datasheet
1.ST92F124.pdf
(426 pages)
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CONTROLLER AREA NETWORK (Cont’d)
MAILBOX DATA LENGTH CONTROL REGIS-
TER (MDLC)
All bits of this register is write protected when the
mailbox is not in empty state.
Read / Write
Reset Value: xxxx xxxx (xxh)
Bit 7 = TGT Transmit Global Time
This bit is active only when the hardware is in the
Time Trigger Communication mode, TTCM bit of
the CCR register is set.
0: MTSRH and MTSRL registers are not sent.
1: MTSRH and MTSRL registers are sent in the
6:4 = Reserved. Forced to 0 by hardware.
Bit 3:0 = DLC[3:0] Data Length Code
This field defines the number of data bytes a data
frame contains or a remote frame request.
MAILBOX DATA REGISTERS (MDAR[7:0])
All bits of this register are write protected when the
mailbox is not in empty state.
Read / Write
Reset Value: xxxx xxxx (xxh)
Bit 7:0 = DATA[7:0] Data
A data byte of the message. A message can con-
tain from 0 to 8 data bytes.
DATA7
TGT
last two data bytes of the message.
7
7
DATA6
0
DATA5
0
DATA4
0
DATA3
DLC3
DATA2
DLC2
DATA1
DLC1
DATA0
DLC0
0
0
CONTROLLER AREA NETWORK (bxCAN)
MAILBOX TIME STAMP LOW REGISTER
(MTSLR)
Read / Write
Reset Value: xxxx xxxx (xxh)
Bit 7:0 = TIME[7:0] Message Time Stamp Low
This fields contains the low byte of the 16-bit timer
value captured at the SOF detection.
MAILBOX TIME STAMP HIGH REGISTER
(MTSHR)
Read / Write
Reset Value: xxxx xxxx (xxh)
Bit 7:0 = TIME[15:8] Message Time Stamp High
This field contains the high byte of the 16-bit timer
value captured at the SOF detection.
TIME15 TIME14 TIME13 TIME12 TIME11 TIME10
TIME7
7
7
TIME6
TIME5
TIME4
TIME3
TIME2
TIME1
TIME9
351/426
TIME0
TIME8
0
0
9
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