ltc2493 Linear Technology Corporation, ltc2493 Datasheet - Page 21

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ltc2493

Manufacturer Part Number
ltc2493
Description
24-bit 2-/4-channel Delta Sigma Adc With Easy Drive Input Current Cancellation And I2c Interface
Manufacturer
Linear Technology Corporation
Datasheet

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applicaTions inForMaTion
Continuous Read/Write
Once the conversion cycle is concluded, the LTC2493 can
be written to and then read from using the Repeated Start
(Sr) command.
Figure 8 shows a cycle which begins with a data Write, a
repeated Start, followed by a Read and concluded with a
Stop command. The following conversion begins after all
32 bits are read out of the device or after a Stop command.
The following conversion will be performed using the
newly programmed data. In cases where the same speed
(1x/2x mode) and rejection frequency (50Hz, 60Hz, 50Hz
CONVERSION
S
7-BIT ADDRESS
CONVERSION
S
CONVERSION
S
7-BIT ADDRESS
SLEEP
7-BIT ADDRESS
R
Figure 9. Start a New Conversion Without Reading Old Conversion Result
ACK
Figure 7. Consecutive Reading with the Same Input/Configuration
DATA INPUT
SLEEP
READ
SLEEP
W ACK
W ACK
Figure 8. Write, Read, Start Conversion
DATA INPUT
WRITE
P
WRITE (OPTIONAL)
DATA INPUT
CONVERSION
Sr
and 60Hz) is used but the channel is changed, a Stop or
Repeated Start may be issued after the first byte (channel
selection data) is written into the device.
Discarding a Conversion Result and Initiating a New
Conversion with Optional Write
At the conclusion of a conversion cycle, a write cycle
can be initiated. Once the write cycle is acknowledged, a
Stop command will start a new conversion. If a new input
channel or conversion configuration is required, this data
can be written into the device and a Stop command will
initiate the next conversion (see Figure 9).
7-BIT ADDRESS
S
ADDRESS
7-BIT ADDRESS
CONVERSION
P
R
SLEEP
ACK
DATA OUTPUT
R
ACK
DATA OUTPUT
READ
READ
LTC2493
2493 F09
CONVERSION
P
CONVERSION
P
2493 F08

2493fa
2493 F07

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