mt45w1mw16pdga Micron Semiconductor Products, mt45w1mw16pdga Datasheet - Page 17
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mt45w1mw16pdga
Manufacturer Part Number
mt45w1mw16pdga
Description
16mb 1 Meg X 16 Async/page Cellularram 1.0 Memory
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT45W1MW16PDGA.pdf
(29 pages)
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Page Mode READ Operation (CR[7]) Default = Disabled
Table 3:
PDF: 09005aef81cadc83/Source:09005aef81c6edb4
16mb_asyncpage_cr1_0_p23z_2.fm - Rev. F 4/08 EN
CR[2]
0
0
0
0
1
1
1
1
16Mb Address Patterns for PAR (CR[4] = 1)
CR[1]
0
0
1
1
0
0
1
1
CR[0]
The TCR bits also allow for adequate fixed-rate refresh at three different temperature
thresholds (+15°C, +45°C, and +85°C). The setting selected must be for a temperature
higher than the case temperature of the CellularRAM device. If the case temperature
is +35°C, the system can minimize self refresh current consumption by selecting the
+45°C setting. Using the +15°C setting in the same environment would result in an
inadequate refresh rate and cause data corruption.
The page mode operation bit determines whether page mode READ operations are
enabled. In the power-up default state, page mode is disabled.
0
1
0
1
0
1
0
1
One-quarter of die
One-quarter of die
One-eighth of die
One-eighth of die
Active Section
One-half of die
One-half of die
None of die
16Mb: 1 Meg x 16 Async/Page CellularRAM 1.0 Memory
Full die
17
Address Space
00000h–7FFFFh
00000h–3FFFFh
00000h–1FFFFh
C0000h–FFFFFh
00000h–FFFFFh
80000h–FFFFFh
E0000h–FFFFFh
Micron Technology, Inc., reserves the right to change products or specifications without notice.
0
Configuration Register Operation
1 Meg x 16
0 Meg x 16
512K x 16
256K x 16
128K x 16
512K x 16
256K x 16
128K x 16
Size
©2005 Micron Technology, Inc. All rights reserved.
Density
16Mb
8Mb
4Mb
2Mb
0Mb
8Mb
4Mb
2Mb