ics1893cy-10 Integrated Device Technology, ics1893cy-10 Datasheet - Page 132

• Manufacturer Part Number: ics1893cy-10
• Description: 3.3-v 10base-t/100base-tx Integrated Phyceiver
• Manufacturer: Integrated Device Technology

9.5.15 100M MII / 100M Stream Interface: Receive Latency
ICS1893CY-10 Rev 1/07
TP_RX
RXCLK
RXD
Table 9-22
time periods consist of timings of signals on the following pins:
•
•
•
Figure 9-16
Table 9-22. 100M MII / 100M Stream Interface Receive Latency Timing
Figure 9-16. 100M MII / 100M Stream Interface: Receive Latency Timing Diagram
†
unscrambled.
Period
Time
TP_RX (that is, TP_RXP and TP_RXN)
RXCLK
RXD (that is, RXD[3:0])
Shown
t1
t2
ICS1893CY-10 - Release
†
First Bit of /J/ into TP_RX to /J/ on RXD 100M MII
First Bit of /J/ into TP_RX to /J/ on RXD 100M Stream Interface
lists the significant time periods for the 100M MII / 100M Stream Interface receive latency. The
shows the timing diagram for the time periods.
Parameter
Copyright © 2007, Integrated Device Technology, Inc.
All rights reserved.
133
t1
t2
Conditions
Chapter 9 DC and AC Operating Conditions
Min. Typ. Max.
–
–
16
8
17
9
Bit times
Bit times
Units