pc87311a National Semiconductor Corporation, pc87311a Datasheet - Page 24

• Manufacturer Part Number: pc87311a
• Description: Pc87311a/pc87312 Superi/otm Ii/iii Floppy Disk Controller With Dual Uarts, Parallel Port, And Ide Interface
• Manufacturer: National Semiconductor Corporation

3 0 FDC Register Description
(Continued)
D0
3 10 3 Status Register 2 (ST2)
D7
D6
D5
D4
D3
D2
D1
D0
3 10 4 Status Register 3 (ST3)
D7
D6
D5
D4
D3
D2
D1 D0 Drive Select 1 0 These two binary encoded bits
DESC
RESET
COND
DESC
RESET
COND
Missing Address Mark If bit 0 of ST2 is clear then
the controller cannot detect any Address Field Ad-
dress Mark after two disk revolutions If bit 0 of ST2
is set then the controller cannot detect the Data
Field Address Mark after finding the correct Ad-
dress Field
Not Used Always 0
Control Mark Controller tried to read a sector
which contained a deleted data address mark dur-
ing execution of Read Data or Scan commands Or
if a Read Deleted Data command was executed a
regular address mark was detected
CRC Error in Data Field Controller detected a
CRC error in the Data Field Bit 5 of ST1 is also set
Wrong Track Only set if desired sector is not
found and the track number recorded on any sector
of the current track is different from the track ad-
dress specified in the Command Phase
Scan Equal Hit ‘‘Equal’’ condition satisfied during
any Scan command
Scan Not Satisfied Controller cannot find a sector
on the track which meets the desired condition dur-
ing any Scan command
Bad Track Only set if the desired sector is not
found the track number recorded on any sector on
the track is FF (hex) indicating a hard error in IBM
format and is different from the track address spec-
ified in the Command Phase
Missing Address Mark in Data Field Controller
cannot find the Data Field AM during a Read Scan
or Verify command Bit 0 of ST1 is also set
Not Used Always 0
Write Protect Indicates active high status of the
WP pin
Not Used Always 1
Track 0 Indicates active high status of the TRK0
pin
Not Used Always 1
Head Select Indicates the active high status of the
HD bit in the Command Phase
indicate the DS1 DS0 bits in the Command Phase
D7
D7
0
0
0
0
WP
CM
D6
D6
0
0
D5
CD
D5
1
1
0
TK0
D4
WT
D4
0
0
D3
SEH
1
1
D3
0
HDS
D2
0
SNS
D2
0
DS1
D1
0
D1
BT
0
DS0
MD
D0
D0
0
0
24
4 0 FDC Command Set Description
The following is a table of the FDC command set Each
command contains a unique first command byte called the
opcode byte which will identify to the controller how many
command bytes to expect If an invalid command byte is
issued to the controller it will immediately go into the Result
Phase and the status will be 80 (hex) which signifies Invalid
Command
4 1 COMMAND SET SUMMARY
CONFIGURE
Command Phase
Execution Phase Internal registers written
No Result Phase
DUMPREG
Command Phase
Execution Phase Internal registers read
Result Phase
Note Sectors per Track parameter returned if last command issued was
Format End of Track parameter returned if last command issued was Read
or Write
FORMAT TRACK
Command Phase
Execution Phase System transfers four ID bytes (track
head sector bytes sector) per sector to the floppy control-
ler via DMA or Non-DMA modes The entire track is format-
ted The data block in the Data Field of each sector is filled
with the data pattern byte
LOCK
X
0
0
0
0
0
0
Step Rate Time
MFM
EIS
0
0
EIS
X
0
0
FIFO
Sector per Track End of Track
DC3
FIFO
0
0
X
0
0
Motor On Time
Sectors per Track
Bytes per Sector
POLL
X
0
Data Pattern
DC2
PTR Drive 0
PTR Drive 1
PTR Drive 2
PTR Drive 3
Format Gap
0
PRETRK
PRETRK
POLL
1
0
X
1
DC1
1
HD
0
0
1
Motor Off Time
DC0
1
THRESH
THRESH
0
0
DR1
0
GAP
1
1
0
DR0
DMA
WG
1
0
1
0