w83194r-630a Winbond Electronics Corp America, w83194r-630a Datasheet
w83194r-630a
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w83194r-630a Summary of contents
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... W83194R-630A provides the 0.5%, 0.75% center type and 0~0.5% down type spread spectrum to reduce EMI. The W83194R-630A accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply. High drive PCI and SDRAM CLOCK outputs typically provide greater than 1 V /ns slew rate into 30 pF loads. CPU CLOCK outputs typically provide better than 1 V /ns slew rate into 20 pF loads as maintaining 50± ...
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... W83194R-630A PRELIMINARY 48MHz 24_48MHz REF(0:1) 2 CPUCLK(0:2) 3 SDRAM(0:13) 14 PCICLK(0:6) 7 REF1 VddLCPU CPUCLK_F CPUCLK0 Vss CPUCLK1 VddSD SDRAM12 SDRAM_F Vss SDRAM11 SDRAM 10 VddSD SDRAM 9 SDRAM 8 Vss SDRAM 7 SDRAM 6 ...
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... PD# input pin when MODE=0. OUT SDRAM clock outputs which have syn. or asyn. frequencies as CPU clocks I/O Latched input for FS1 at initial power up for H/W selecting the output frequency of CPU, SDRAM and PCI clocks W83194R-630A PRELIMINARY FUNCTION FUNCTION Publication Release Date: Nov. 1999 Revision 0.65 ...
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... I2C for Super I/O. 26 I/O Internal 250k Latched input for FS0 at initial power up for H/W selecting the output frequency of CPU, SDRAM and PCI clocks. 48MHz output for USB during normal operation W83194R-630A PRELIMINARY FUNCTION 2 C 2-wire control interface 2 C 2-wire control interface FUNCTION pull-up. ...
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... W83194R-630A PRELIMINARY FUNCTION PCI (MHz) REF (MHz) IOAPIC 33.4 14.318 33.4 14.318 33.2 14.318 33.4 14.318 37.5 14.318 33.4 14.318 33.4 14.318 33.4 14.318 33.4 14.318 32.3 14.318 32.3 14.318 31.7 14.318 35 14.318 37 ...
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... All proceeding bytes must be sent to change one of the control bytes. The 2-wire control interface allows each clock output individually enabled or disabled. W83194R-630A initializes with default register settings, and then it interface. The SDATA signal only changes when the SDCLK signal is low, and is stable when SDCLK is high during normal data transfer ...
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... SSEL1 (for frequency table selection by software via I SSEL0 (for frequency table selection by software via Selection by hardware 1 = Selection by software I SSEL3 (for frequency table selection by software via Normal 1 = Spread Spectrum enabled 0 = Running 1 = Tristate all outputs - 7 - W83194R-630A PRELIMINARY PCI (MHz) REF (MHz) IOAPIC 33.4 14.318 33.4 14.318 33.2 14 ...
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... PCICLK2 (Active / Inactive) PCICLK1 (Active / Inactive) PCICLK0 (Active / Inactive Pin25 24_48MHz = 24MHz 0 Pin25 24_48MHz = 48MHz - Latched FS0# 48MHz (Active / Inactive) 24-48MHz (Active / Inactive) - Reserved - Reserved REF1 (Active / Inactive) 2 REF0X2 (Active / Inactive W83194R-630A PRELIMINARY Description Description Description Publication Release Date: Nov. 1999 Revision 0.65 ...
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... SDRAM4 (Active / Inactive) SDRAM3 (Active / Inactive) SDRAM2 (Active / Inactive) SDRAM1 (Active / Inactive) SDRAM0 (Active / Inactive) Description Winbond Chip ID Winbond Chip ID Winbond Chip ID Winbond Chip ID Winbond Chip ID Winbond Chip ID Winbond Chip ID Winbond Chip W83194R-630A PRELIMINARY Publication Release Date: Nov. 1999 Revision 0.65 ...
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... W83194R-630A 10. HOW TO READ THE TOP MARKING W83194R-630A 28051234 942GED 1st line: Winbond logo and the type number: W83194R-630A 2nd line: Tracking code 2 8051234 2: wafers manufactured in Winbond FAB 2 8051234: wafer production series lot number 3rd line: Tracking code 942 942: packages made in '99, week 42 G: assembly house ID ...
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... Rm. 803, World Trade Square, Tower II 123 Hoi Bun Rd., Kwun Tong Kowloon, Hong Kong TEL: 852-27516023-7 FAX: 852-27552064 Winbond customers using or selling these Publication Release Date: Nov. 1999 - 11 - W83194R-630A PRELIMINARY Winbond Electronics (North America) Corp. 2730 Orchard Parkway San Jose, CA 95134 U.S.A. TEL: 1-408-9436666 FAX: 1-408-9436668 ...