lmk03000c National Semiconductor Corporation, lmk03000c Datasheet - Page 18
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lmk03000c
Manufacturer Part Number
lmk03000c
Description
Precision Clock Conditioner With Integrated Vco
Manufacturer
National Semiconductor Corporation
Datasheet
1.LMK03000C.pdf
(26 pages)
www.national.com
2.6.2 PLL_MUX[3:0] -- Multiplexer Control for LD Pin
These bits set the output mode of the LD pin. The table below lists several different modes.
2.6.3 POWERDOWN bit -- Device Power Down
This bit can power down the device. Enabling this bit powers down the entire device and all blocks, regardless of the state of any
of the other bits or pins.
2.6.4 EN_CLKout_Global bit -- Global Clock Output Enable
This bit overrides the individual CLKoutX_EN bits (See 2.3.5). When this bit is set to 0, all clock outputs are disabled, regardless
of the state of any of the other bits or pins. See 1.8 for more information on CLKout states.
2.6.5 EN_Fout bit -- Fout port enable
This bit enables the Fout pin.
PLL_MUX[3:0]
12 to 15
10
11
0
1
2
3
4
5
6
7
8
9
EN_CLKout_Global bit
POWERDOWN bit
EN_Fout bit
0
1
0
1
0
1
Open Drain NMOS
Open Drain PMOS
Output Type
Push-Pull
Push-Pull
Push-Pull
Push-Pull
Push-Pull
Push-Pull
Push-Pull
Hi-Z
18
Entire Device Powered Down
Normal Operation (default)
Normal Operation (default)
Disabled (default)
Fout Pin Status
Clock Outputs
Enabled
All Off
Mode
Invalid
Invalid
Invalid
N Divider Output/2 (50% Duty Cycle)
R Divider Output/2 (50% Duty Cycle)
Digital Lock Detect (Active High)
Digital Lock Detect (Active Low)
Analog Lock Detect
Analog Lock Detect
Analog Lock Detect
Disabled (default)
LD Pin Function
Logic High
Logic Low