74vhc175 Fairchild Semiconductor, 74vhc175 Datasheet - Page 4
74vhc175
Manufacturer Part Number
74vhc175
Description
Quad D-type Flip-flop
Manufacturer
Fairchild Semiconductor
Datasheet
1.74VHC175.pdf
(7 pages)
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f
t
t
t
t
t
t
C
C
t
t
t
t
t
t
MAX
PLH
PHL
PLH
PHL
OSLH
OSHL
AC Electrical Characteristics
Note 4: Parameter guaranteed by design. t
Note 5: C
operating current can be obtained from the equation: I
be calculated by the following equation: C
AC Operating Requirements
W
W
W
S
H
REC
Note 6: V
IN
PD
Symbol
Symbol
(L)
(H)
(L)
PD
CC
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
Maximum Clock
Frequency
Propagation Delay
Time (CP to Q
Propagation Delay Time
(MR to Q
Output to
Output Skew
Input Capacitance
Power Dissipation
Capacitance
Minimum Pulse Width (CP)
Minimum Pulse Width (MR)
Minimum Setup Time (Dn to CP)
Minimum Hold Time (Dn to CP)
Minimum Removal Time (MR)
is 3.3
0.3V or 5.0
Parameter
n
or Q
n
n
or Q
)
Parameter
n
0.5V
)
PD
OSLH
(total)
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
V
(V)
|t
CC
PLHmax
0.3
0.5
0.3
0.5
0.3
0.5
0.3
0.5
30
CC
(opr.)
14 • n
t
Min
150
PLHmin
90
50
85
C
PD
|; t
* V
OSHL
T
(Note 6)
A
CC
10.0
V
Typ
140
210
115
7.5
4.8
6.3
6.3
8.8
4.3
5.8
(V)
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
75
44
* f
4
CC
25 C
| t
IN
4
PHLmax
I
CC
/4 (per F/F), and the total C
Max
11.5
15.0
10.1
13.6
7.3
9.3
6.4
8.4
1.5
1.0
10
t
PHLmin
Typ
|.
T
A
T
A
Min
125
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
75
45
75
25 C
40 C to 85 C
5.0
5.0
5.0
5.0
5.0
4.0
1.0
1.0
5.0
5.0
Guaranteed Minimum
PD
Max
13.5
17.0
10.5
12.0
15.5
8.5
7.5
9.5
1.5
1.0
10
when n pcs of the Flip-Flop operate can
T
A
Units
MHz
MHz
pF
pF
40 C to 85 C
ns
ns
ns
ns
5.0
5.0
5.0
5.0
5.0
4.0
1.0
1.0
5.0
5.0
C
C
C
C
C
C
C
C
C
C
C
C
C
C
(Note 4)
V
(Note 5)
CC
L
L
L
L
L
L
L
L
L
L
L
L
L
L
15 pF
50 pF
15 pF
50 pF
15 pF
50 pF
15 pF
50 pF
15 pF
50 pF
15 pF
50 pF
50 pF
50 pF
Conditions
Open
Units
ns
ns
ns
ns
ns