74VHC244MTC Fairchild Semiconductor, 74VHC244MTC Datasheet

IC BUFF/DVR TRI-ST DUAL 20TSSOP

74VHC244MTC

Manufacturer Part Number
74VHC244MTC
Description
IC BUFF/DVR TRI-ST DUAL 20TSSOP
Manufacturer
Fairchild Semiconductor
Series
74VHCr
Datasheet

Specifications of 74VHC244MTC

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
4
Current - Output High, Low
8mA, 8mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Logic Family
74VHC
Number Of Channels Per Chip
Octal
Polarity
Non-Inverting
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
85 C
Mounting Style
SMD/SMT
High Level Output Current
- 8 mA
Input Bias Current (max)
4 uA
Low Level Output Current
8 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
8
Output Type
3-State
Propagation Delay Time
11.9 ns @ 3.3 V or 7.5 ns @ 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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© 2005 Fairchild Semiconductor Corporation
74VHC244M
74VHC244SJ
74VHC244MTC
74VHC244N
74VHC244
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The VHC244 is an advanced high speed CMOS octal bus
buffer fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power dissi-
pation. The VHC244 is a non-inverting 3-STATE buffer hav-
ing two active-LOW output enables. These devices are
designed to be used as 3-STATE memory address drivers,
clock drivers, and bus oriented transmitter/receivers.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and two supply systems such as battery back up. This cir-
cuit prevents device destruction due to mismatched supply
and input voltages.
Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
Order Number
Package Number
MTC20
IEEE/IEC
M20B
M20D
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
DS011522
Features
Connection Diagram
High Speed: t
High noise immunity: V
Power down protection is provided on all inputs
Low noise: V
Low power dissipation: I
Pin and function compatible with 74HC244
Package Description
OLP
PD
3.9ns (typ) at V
0.6V (typ)
NIH
CC
November 1992
Revised April 2005
V
4 A (max) @ T
NIL
CC
28% V
www.fairchildsemi.com
5V
CC
A
(min)
25 C

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74VHC244MTC Summary of contents

Page 1

... M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74VHC244SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHC244N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “ ...

Page 2

Pin Descriptions Pin Names – – Truth Tables HIGH Voltage Level L LOW Voltage Level I Immaterial Z ...

Page 3

Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage ( OUT Input Diode Current ( Output Diode Current ( Output Current (I ) ...

Page 4

AC Electrical Characteristics V Symbol Parameter ( Propagation Delay 3.3 PLH t Time PHL r 5 3-STATE Output 3.3 PZL t Enable Time PZH r 5 3-STATE Output 3.3 PLZ r t Disable Time ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M20D 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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