74vhc112 Fairchild Semiconductor, 74vhc112 Datasheet

74vhc112

Manufacturer Part Number

74vhc112

Description

Dual J-k Flip-flops With Preset And Clear

Manufacturer

Fairchild Semiconductor

Datasheet

1.74VHC112.pdf (7 pages)

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74VHC112M

74VHC112SJ

74VHC112MTC

74VHC112N

74VHC112

Dual J-K Flip-Flops with Preset and Clear

General Description

The VHC112 is an advanced high speed CMOS device

fabricated with silicon gate CMOS technology. It achieves

the high-speed operation similar to equivalent Bipolar

Schottky TTL while maintaining the CMOS low power dissi-

pation.

The VHC112 contains two independent, high-speed JK flip-

flops with Direct Set and Clear inputs. Synchronous state

changes are initiated by the falling edge of the clock. Trig-

gering occurs at a voltage level of the clock and is not

directly related to transition time. The J and K inputs can

change when the clock is in either state without affecting

the flip-flop, provided that they are in the desired state dur-

ing the recommended setup and hold times relative to the

falling edge of the clock. The LOW signal on PR or CLR

prevents clocking and forces Q and Q HIGH, respectively.

Ordering Code:

Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Order Number

Package Number

MTC16

M16A

M16D

N16E

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

DS012123.prf

Simultaneous LOW signals on PR and CLR force both Q

and Q HIGH.

An input protection circuit ensures that 0V to 7V can be

applied to the input pins without regard to the supply volt-

age. This device can be used to interface 5V to 3V systems

and two supply systems such as battery backup. This cir-

cuit prevents device destruction due to mismatched supply

and input voltages.

Features

Pin Descriptions

CLK

CLR

, J

High speed: f

Low power dissipation: I

High noise immunity: V

Power down protection is provided on all inputs

Pin and function compatible with 74HC112

, Q

Pin Names

, PR

, K

, CLK

, CLR

, Q

Package Description

, K

, Q

MAX

= 200 MHz (typ) at V

Data Inputs

Clock Pulse Inputs (Active Falling Edge)

Direct Clear Inputs (Active LOW)

Direct Preset Inputs (Active LOW)

Outputs

NIH

= V

= 2 A (max) at T

September 1995

Revised April 1999

NIL

Description

= 28% V

www.fairchildsemi.com

= 5.0V

(min)

= 25 C

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74vhc112 Summary of contents

Page 1

... MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHC112N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...

Page 2

Truth Table (h) HIGH Voltage Level L (l) LOW Voltage Level X Immaterial HIGH-to-LOW Clock Transition Before HIGH-to-LOW Transition of Clock 0 0 Lower case letters indicate ...

Page 3

Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage ( OUT Input Diode Current ( Output Diode Current ( Output Current (I ) ...

Page 4

AC Electrical Characteristics V CC Symbol Parameter (V) f Maximum Clock 3.3 0.3 MAX Frequency 5.0 0.5 t Propagation Delay 3.3 0.3 PLH t Time ( PHL n n 5.0 0.5 t Propagation Delay Time ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16A Package Number M16D 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide www.fairchildsemi.com Package Number MTC16 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN ...

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