tea6360t-v2 NXP Semiconductors, tea6360t-v2 Datasheet - Page 9

• Manufacturer Part Number: tea6360t-v2
• Description: 5-band Stereo Equalizer Circuit
• Manufacturer: NXP Semiconductors

Philips Semiconductors
I
I
If more than 1 byte DATA are transmitted, then auto-increment of the subaddress is performed.
Byte organisation
Table 1 I
Function of the bits of Table 1:
1B0
1B0
2B0
2B0
3B0
3B0
4B0
4B0
5B0
5B0
DEF
May 1991
2
2
S
SLAVE ADDRESS
A
SUBADDRESS
DATA
P
filter 1/defeat
filter 2
filter 3
filter 4
filter 5
C-BUS PROTOCOL
C-bus format
5-band stereo equalizer circuit
S
FUNCTION
to
to
to
to
to
to
to
to
to
to
2
C-bus transmission
1B2
1B2
2B2
2B2
3B2
3B2
4B2
4B2
5B2
5B2
SLAVE ADDRESS
boost control for filter 1
cut control for filter 1
boost control for filter 2
cut control for filter 2
boost control for filter 3
cut control for filter 3
boost control for filter 4
cut control for filter 4
boost control for filter 5
cut control for filter 5
DEF = 0 (defeat bit):
DEF = 1:
0
0
0
0
0
SUBADDRESS BYTE
0
0
0
0
0
=
=
=
=
=
=
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
start condition
1000 0100 when pin 18 is set LOW
or 1000 0110 when pin 18 is set HIGH or open-circuit
acknowledge, generated by the slave
subadress byte, see Table 1
data byte, see Table 1
stop condition
0
0
0
0
1
A
All filters operating.
Linear frequency response, input is directly connected to the output of the
output amplifier. The filter settings are stored but the internal amplification
is controlled to 0 dB, independent on bits nB2 to nB0.
0
0
1
1
0
0
1
0
1
0
SUBADDRESS
DEF
D7
0
0
0
0
9
1B2
2B2
3B2
4B2
5B2
D6
1B1
2B1
3B1
4B1
5B1
D5
DATA BYTE
A
1B0
2B0
3B0
4B0
5B0
D4
D3
0
0
0
0
0
Preliminary specification
DATA
1C2
2C2
3C2
4C2
5C2
D2
TEA6360
1C1
2C1
3C1
4C1
5C1
D1
1C0
2C0
3C0
4C0
5C0
P
D0