tda7468 STMicroelectronics, tda7468 Datasheet
tda7468
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tda7468 Summary of contents
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... SERIAL BUS ■ EXTERNALLY ADJUSTABLE SURROUND ■ 2 DESCRIPTION The TDA7468D is a volume tone (bass and treble) balance (Left/Right) processor for quality audio Figure 2. PIN CONNECTION (Top view) March 2006 TWO BANDS DIGITALLY CONTROLLED Figure 1. Package Table 1. Order Codes applications in Hi-Fi systems. ...
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... TDA7468D Figure 3. BLOCK DIAGRAM 2/22 ...
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... Input Gain (2dB step) Volume Control (1dB step) Treble Control (2dB step) Bass Control (2dB step) Mute Attenuation Parameter Parameter Parameter KHz V = 1Vrms 0.1Vrms 1KHz 1Vrms (0dB) out TDA7468D Value 10 -55 to 150 Value 85 Min. Typ. Max 0.01 % 0.1 ...
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... TDA7468D ELECTRICAL CHARACTERISTICS (refer to the test circuit T amb specified) Symbol Parameter SUPPLY V Supply Voltage S I Supply Current S SVR Ripple Rejection INPUT STAGE R Input Resistance IN V Clipping Level CL S Input Separation IN G Minimum Input Gain inmin G Maximum Input Gain inmax G Step Resolution ...
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... TDA7468D Max. Unit ±16 KΩ KΩ KΩ KΩ KΩ mVrms mVrms mVrms mVrms +15 KΩ V rms KΩ V µV µ 0 ...
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... TDA7468D Figure 4. TEST CIRCUIT 6/22 ...
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... The very high resolution allows the implementation of systems free from any noisy acoustical effect. The TDA7468D audioprocessor provides 2 bands tones control. 3.1 Bass, Stages The Bass cell has an internal resistor R Several filter types can be implemented, connecting external components to the Bass IN and OUT pins ...
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... TDA7468D BUS INTERFACE Data transmission from microprocessor to the TDA7468D and vice versa takes place through the 2 wires BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected). 4.1 Data Validity As shown in fig. 6, the data on the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW ...
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... ACK = Acknowledge S = Start Stop A = Address B = Auto Increment 6 EXAMPLES 6.1 No Incremental Bus The TDA7468D receives a start condition, the correct chip address, a subaddress with the (no in- cremental bus), N-data (all these data concern the subaddress selected), a stop condition. CHIP ADDRESS MSB LSB ...
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... TDA7468D 7 DATA BYTES Address = (HEX) 10001000. Table 6. FUNCTION SELECTION: First byte (subaddress) MSB INCREMENTAL BUS; ACTIVE INCREMENTAL BUS X = INDIFFERENT 0/1 Table 7. INPUT SELECTION & MIC MSB D7 D6 ...
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... LSB SURROUND D0 SURROUND MODE OFF GAIN 0 0dB 1 6dB 0 9dB 1 12dB MIXING inverting : 100% inverting :50% inverting : 25% 0% non-inverting : 100% non-inverting : 75% non-inverting : 50% mute BUFFER GAIN 0 6dB TDA7468D 11/22 ...
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... TDA7468D Table 10. VOLUME MSB VOLUME = 0 to-87dB Table 11. VOLUME setting 1 Target Volume (dB) Volume1 1dB step (dB -10 -11 -12 -13 -14 -15 12/ ...
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... Volume1 8dB step (dB Volume1 8dB step (dB) 0 -56 -1 TDA7468D Volume2 8dB step (dB Volume2 8dB step (dB) 0 13/22 ...
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... TDA7468D Table 11. VOLUME setting 1 (continua) -58 -59 -60 -61 -62 -63 -64 -65 -66 -67 -68 -69 -70 -71 -72 -73 -74 -75 -76 -77 -78 -79 -80 -81 -82 -83 -84 -85 -86 -87 Table 12. VOLUME setting 2 Target Volume (dB) Volume1 1dB step (dB 14/ - -56 ...
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... Volume1 8dB step ( TDA7468D Volume2 8dB step (dB -16 -24 15/22 ...
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... TDA7468D Table 12. VOLUME setting 2 (continua) Target Volume (dB) Volume1 1dB step (dB) -48 -49 -50 -51 -52 -53 -54 -55 -56 -57 -58 -59 -60 -61 -62 -63 -64 -65 -66 -67 -68 -69 -70 -71 -72 -73 -74 -75 -76 -77 -78 -79 -80 -81 -82 -83 -84 -85 -86 -87 16/22 Volume1 8dB step (dB ...
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... TDA7468D LSB D0 TREBLE 0 -14dB 1 -12dB 0 -10dB 1 -8dB 0 -6dB 1 -4dB 0 -2dB 1 0dB 0 14dB 1 12dB 0 10dB 1 8dB 0 6dB 1 4dB 0 2dB 1 0dB BASS (*) -14dB -12dB ...
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... TDA7468D Table 15. BASS ALC MSB Figure 9. BASS ALC : Threshold curve RMS Supply Voltage : 9.0V Frequency : 60Hz Bassfilter : 60Hz/28dB boost Internal release circuit : ON Attack mode : 12.5kohm, mode2(adaptive) 1 0.1 0.01 0.1 18/ Figure 10. BASS ALC : THD ...
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... Figure 14. PINS: SCL, SDA V S GND Figure 15. PINS: BASSI_L, BASSI_R 20µA D99AU1092 Figure 16. PINS: BASSO_L, BASSO_R 20µA D99AU1093 Figure 17. PIN: ALC Figure 18. PIN: CREF D99AU1094 20µA D99AU1095 TDA7468D V S 20µA 45K GND BASSO-L,BASSO-R D99AU1096 V S 20µA 45K GND BASSI-L,BASSI-R D99AU1097 ...
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... TDA7468D Figure 19. SO28 Mechanical Data & Package Dimensions mm DIM. MIN. TYP. MAX. A 2.65 a1 0.1 0.3 b 0.35 0.49 b1 0.23 0.32 C 0.5 c1 45° (typ.) D 17.7 18 10.65 e 1.27 e3 16.51 F 7.4 7.6 L 0.4 1.27 8 ° (max.) S 20/22 inch MIN. TYP. MAX. 0.104 0.004 0.012 0.014 0.019 0.009 0.013 0.020 0.697 0.713 0.394 0.419 0.050 0.65 0.291 ...
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... Table 16. Revision History Date Revision January 2004 June 2004 March 2006 1 First Issue in EDOCS DMS 2 Changed the Style-sheet in compliance to the new “Corporate Technical Pubblications Design Guide” 3 Updated figure 19 “SO28 Mechanical Data & Package Dimensions” Description of Changes TDA7468D 21/22 ...
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... TDA7468D Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...