74lvc2g02gt NXP Semiconductors, 74lvc2g02gt Datasheet - Page 9
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
74lvc2g02gt
Manufacturer Part Number
74lvc2g02gt
Description
74lvc2g00 Dual 2-input Nand Gate
Manufacturer
NXP Semiconductors
Datasheet
1.74LVC2G02GT.pdf
(15 pages)
NXP Semiconductors
13. Package outline
Fig 9. Package outline SOT505-2 (TSSOP8)
74LVC2G00_5
Product data sheet
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT505-2
max.
1.1
A
0.15
0.00
A 1
8
1
0.95
0.75
A 2
y
pin 1 index
IEC
e
Z
0.25
A 3
D
0.38
0.22
b p
b p
5
0
0.18
0.08
4
JEDEC
c
- - -
w
REFERENCES
Rev. 05 — 4 September 2007
D
3.1
2.9
M
(1)
E
3.1
2.9
(1)
c
JEITA
scale
0.65
2.5
e
A
H E
4.1
3.9
A 2
A 1
0.5
L
H E
E
0.47
0.33
5 mm
detail X
L p
0.2
v
L
L p
PROJECTION
EUROPEAN
0.13
w
A
(A 3 )
Dual 2-input NAND gate
74LVC2G00
0.1
y
X
v
M
0.70
0.35
Z
© NXP B.V. 2007. All rights reserved.
A
(1)
ISSUE DATE
02-01-16
8
0
SOT505-2
9 of 15