hsp43216 Intersil Corporation, hsp43216 Datasheet - Page 4

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hsp43216

Manufacturer Part Number
hsp43216
Description
Halfband Filter
Manufacturer
Intersil Corporation
Datasheet

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Functional Description
The operation of the HSP43216 centers around a fixed
coefficient, 67-Tap, Halfband Filter Processor as shown in
Figure 1. The Halfband Filter Processor operates stand
alone to provide two fundamental modes of operation:
interpolate or decimate by two filtering of a real signal. In two
other modes, the Quadrature Up/Down Convert circuitry
operates together with the Filter Processor block to provide
f
Quadrature to Real Conversion.
In Down Convert and Decimate mode, a real input sample
stream is spectrally shifted by f
resulting complex signal is then halfband filtered and
decimated by 2 to produce real and imaginary output
samples at half of the input data rate.
In Quadrature to Real Conversion mode, the real and
imaginary components of a quadrature input are interpolated
by two and halfband filtered. The filtered result is then
spectrally shifted by f
operation is output at twice the input sample rate.The
HSP43216 is configured for different operational modes by
setting the state of the mode control pins, MODE1-0 as
shown in Table 1.
S
/4 Down Conversion with decimate by 2 filtering or
AIN0-15
BIN0-15
MODE0-1
USB/LSB
INT/EXT
RND0-2
SYNC
CLK
FMT
INPUT DATA FLOW
G
R
E
R
E
G
CONTROLLER
R
E
G
R
E
G
S
/4 and the real component of this
M
U
X
4
S
/4. Each component of the
f
S
DOWN CONVERT
/4 QUADRATURE
R
E
G
R
E
G
PROCESSOR
1
1
MUX
MUX
-1,1,-1,.
1,-1,1,..
FIGURE 1. HALFBAND BLOCK DIAGRAM
R
E
G
R
G
E
67-TAP HALFBAND
Indicates elements which operate at CLK/2 when the INT/EXT control input is high.
PROCESSOR
DELAY 2 - 35
PIPELINE
SYNC
EVEN TAP
ODD TAP
f
L.O.
DELAY 19
S
PIPELINE
FILTER
FILTER
FILTER
HSP43216
/4
USB/LSB
...,2,-2,2
..,-2,2,-2
f
Input Data Flow Controller
The Input Data Flow Controller routes data samples from the
AIN0-15 and BIN0-15 inputs to the internal processing
elements of the Halfband. The data routing paths are based
on mode of operation and are more fully discussed in the
Operational Modes section.
f
The f
Quadrature LO which provides the negative f
shift required to center the upper sideband of a real input
signal at DC. This operation is equivalent to multiplying the
real sample stream, x(n), by the quadrature components of
the complex exponential e
S
x n
S
/4 QUADRATURE
( )
UP CONVERT
PROCESSOR
/4 Quadrature Down Convert Processor
e j πn 2
S
MODE1-0
/4 Quadrature Down Convert Processor operates as a
MUX
MUX
(
00
01
10
11
1
1
2
2
G
G
R
E
R
E
)
TABLE 1. MODE SELECT TABLE
=
x n
( )
+
Decimate by Two
Interpolate by Two
Down Convert and Decimate
Quadrature to Real Conversion
OUTPUT DATA FLOW
cos
R
E
G
CONTROLLER
(
πn 2
-j(π/2)n
M
U
X
)
+
as given below:
R
N
D
jx n
R
N
D
( )
M
M
F
T
F
T
MODE
G
R
G
R
E
sin
E
G
R
E
R
E
G
(
π
S
n 2
OEA
/4 spectral
OEB
AOUT0-15
BOUT0-15
)
April 18, 2007
FN3365.9
(EQ. 1)

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