m41t83 STMicroelectronics, m41t83 Datasheet

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m41t83

Manufacturer Part Number
m41t83
Description
Serial I 2c Bus Rtc With Battery Switchover
Manufacturer
STMicroelectronics
Datasheet

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Features
November 2007
Ultra-low battery supply current of 365nA
Factory calibrated accuracy 5PPM
guaranteed after 2 reflows (SOX18)
– Much better accuracies achievable using
2.0V to 5.5V clock operating voltage
Counters for tenths/hundredths of seconds,
seconds, minutes, hours, day, date, month,
year, and century
Automatic switchover and reset output circuitry
(fixed reference)
– M41T83S
– M41T83R
– M41T83Z
Serial interface supports I
protocol)
Programmable alarm with interrupt function
(valid even during battery back-up mode)
Optional 2
Square wave output defaults to 32KHz on
power-up (M41T83 only)
RESET (RST) output
Watchdog timer
Programmable 8-bit counter/timer
7 bytes of battery-backed user SRAM
Battery low flag
Power-down time stamp (HT bit)
Low operating current of 80µA
built-in programmable analog and digital
calibration circuits
V
(2.85V
V
(2.55V
V
(2.25V
CC
CC
CC
= 3.00V to 5.50V
= 2.70V to 5.50V
= 2.38V to 5.50V
nd
V
V
V
programmable alarm available
RST
RST
RST
3.00V)
2.70V)
2.38V)
2
C Bus (400kHz
Serial I
2
Rev 6
C bus RTC with battery switchover
1. Contact local ST sales office for availability of SOX18
package.
Oscillator stop detection
Battery or Super-cap™ back-up
Operating temperature of –40°C to 85°C
Package options include:
– a 16-lead QFN (M41T83),
– an 18-lead embedded crystal SOIC
– an 8-lead SOIC (M41T82)
RoHS compliance: lead-free components are
compliant with the RoHS directive
(M41T83), or
SOX18 (MY, 18-pin, 300mil SOIC
QFN16, 4mm x 4mm (QA)
with embedded crystal)
(VFQFPN16)
18
SO8 (M)
1
M41T82
M41T83
1
www.st.com
1/58
1

Related parts for m41t83

m41t83 Summary of contents

Page 1

... Battery or Super-cap™ back-up ■ Operating temperature of –40°C to 85°C ■ Package options include: – a 16-lead QFN (M41T83), – an 18-lead embedded crystal SOIC – an 8-lead SOIC (M41T82) ■ RoHS compliance: lead-free components are compliant with the RoHS directive Rev 6 ...

Page 2

... Optional second programmable alarm . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 3.7 Watchdog timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 3.8 8-bit (countdown) timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 3.8.1 Timer interrupt/timer pulse (TI/TP, M41T83 only 3.8.2 Timer flag (TF 3.8.3 Timer interrupt enable (TIE, M41T83 only 3.8.4 Timer enable (TE 3.8.5 TD1 3.9 Square wave output (M41T83 only 3.10 Battery low warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 3.11 Century bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 2/ rec ) . . . . . . . . . . . . . . . . 20 RST ...

Page 3

... Output driver pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 3.13 Oscillator fail detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 3.14 Oscillator fail interrupt enable (M41T83 only 3.15 Initial power-on defaults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 3.16 OTP bit operation (M41T83 in SOX18 package only Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 6 Package mechanical information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 7 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 8 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 3/58 ...

Page 4

... List of tables Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 2. M41T82 clock/control register map (32 bytes Table 3. Key to Table 2: M41T82 clock/control register map (32 Table 4. M41T83 clock/control register map (32 bytes Table 5. Key to Table 4: M41T83 clock/control register map (32 Table 6. Digital calibration values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 7. Analog calibration values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 8. Alarm repeat modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Table 9 ...

Page 5

... List of figures Figure 1. M41T82 logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 2. M41T83 logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 3. SO8 (M) connections (M41T82 Figure 4. QFN16 (QA) connections (M41T83 Figure 5. SOX18 (MY) connections (M41T83 Figure 6. M41T82 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 7. M41T82 hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 8. M41T83 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 9. M41T83 hardware hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 10. Serial bus data transfer sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 11 ...

Page 6

... BCD format. Corrections for 28, 29 (leap year), 30, and 31 day months are made automatically. The M41T83 is supplied in either a QFN16 (QA SOX18 (MY), 300mil SOIC which includes an embedded 32KHz crystal ...

Page 7

... Figure 1. M41T82 logic diagram XI XO SDA SCL 1. Open drain Figure 2. M41T83 logic diagram XI (1) XO (1) SDA SCL 1. For QFN16 package only. 2. Defaults to 32KHz on power-up. 3. Open drain V BAT V CC (1) FT/RST V SS AI11196 V BAT V CC SQW (2) IRQ1/OUT/FT (3) (3) RST (3) IRQ2 V SS AI11195 7/58 ...

Page 8

Table 1. Signal names Symbol (1) XI (1) XO IRQ1/OUT/FT (2) SQW RST FT/RST (3) IRQ2 SDA SCL V BAT ( For SO8 and QFN16 packages only. 2. Defaults to 32KHz on power-up. 3. ...

Page 9

... Figure 3. SO8 (M) connections (M41T82 BAT Open drain output Figure 4. QFN16 (QA) connections (M41T83) (1) RST NC NC (2) SQW 1. Open drain output 2. Defaults to 32Hz on Power-up. Figure 5. SOX18 (MY) connections (M41T83) NC ( (2) RST (3) DU (4) SQW V BAT pins must be tied Pins 2 and 3, and 16 and 17 are internally shorted together. ...

Page 10

Figure 6. M41T82 block diagram CRYSTAL SDA SCL BAT V RST / 2.93V (S), 2.63V (R), and 2.32V (Z). RST SO 2. Open drain output 10/58 REAL TIME CLOCK CALENDAR ...

Page 11

Figure 7. M41T82 hardware hookup V CC M41T82 BAT Open drain output (1) FT/RST SCL SDA MCU V CC Reset Input Serial Clock Line Serial Data Line AI11813 11/58 ...

Page 12

... Figure 8. M41T83 block diagram CRYSTAL SDA SCL BAT V RST /V SO (2) 1. Open drain output 2.93V (S), 2.63V (R), and 2.32V (Z). RST SO 12/58 REAL TIME CLOCK CALENDAR OSCILLATOR FAIL XI CIRCUIT 32KHz OSCILLATOR ALARM1 XO ALARM2 WATCHDOG INTERFACE FREQUENCY TEST OUTPUT DRIVER WRITE PROTECT 8-BIT COUNTER V CC < ...

Page 13

... Figure 9. M41T83 hardware hookup V CC M41T83 V CC IRQ1/FT/OUT BAT Open drain output (1) (1) RST (1) IRQ2 SCL SDA SQW MCU V CC INT Reset Input Port Serial Clock Line Serial Data Line 32KHz CLKIN AI11801 13/58 ...

Page 14

Operation The M41T8x clock operates as a slave device on the serial bus. Access is obtained by implementing a start condition followed by the correct slave address (D0h). The 32 bytes contained in the device can then be accessed ...

Page 15

The bus is intended for communication between different ICs. It consists of two lines: a bi- directional data signal (SDA) and a clock signal (SCL). Both the SDA and SCL lines must be connected to a ...

Page 16

Acknowledge Each byte of eight bits is followed by one Acknowledge bit. This Acknowledge bit is a low level put on the bus by the receiver whereas the master generates an extra acknowledge related clock pulse. A slave receiver ...

Page 17

Read mode In this mode the master reads the M41T8x slave after setting the slave address (see Figure 13 on page Acknowledge bit, the word address 'An' is written to the on-chip address pointer. Next the START condition and ...

Page 18

Figure 13. Read mode sequence BUS ACTIVITY: MASTER SDA LINE S BUS ACTIVITY: SLAVE ADDRESS DATA n+X Figure 14. Alternative read mode sequence BUS ACTIVITY: MASTER SDA LINE S BUS ACTIVITY: SLAVE ADDRESS 18/58 WORD S ADDRESS (An) SLAVE ADDRESS ...

Page 19

Write mode In this mode the master transmitter transmits to the M41T8x slave receiver. Bus protocol is shown in Figure 15. is placed on the bus and indicates to the addressed device that word address “An” will follow and ...

Page 20

Data retention and battery switchover (V Once V falls below the switchover voltage (V CC switches over to the battery and powers down into an ultra low current mode of operation to preserve battery life from V ...

Page 21

... For the M41T83, bit D7 of register 09h (Watchdog register) contains the Oscillator Fail Interrupt Enable bit (OFIE). When the user sets this bit to '1,' any condition which sets the Oscillator Fail bit (OF) (see Section 3 ...

Page 22

... Clock/control register map The M41T8x offers 32 internal registers which contain clock, calibration (digital and analog), Alarm 1 and 2, Watchdog, Flags, Timer, and Square Wave (M41T83 only). The clock registers are memory locations which contain external (user accessible) and internal copies of the data (usually referred to as BiPORT™ TIMEKEEPER independent of internal functions except that they are updated periodically by the simultaneous transfer of the incremented internal copy ...

Page 23

Table 2. M41T82 clock/control register map (32 bytes) Addr 00h 0.1 seconds 01h ST 10 seconds 02h 0 10 minutes 03h CB1 CB0 04h 05h 0 0 06h 07h 10 years ...

Page 24

Table 3. Key to 0 ABE AC0-AC6 ACS AF1, AF2 AL2E BL BMB0-BMB4 CB0, CB1 DC0-DC4 DCS RB0-RB2 RPT11-RPT15 RPT21-RPT25 ST TD0, TD1 TE TF WDF 24/58 Table 2: M41T82 clock/control register map (32 bytes) Code Must ...

Page 25

... AI2 10 hour 17h RPT22 Alarm2 10 minutes 18h RPT21 Alarm2 10 seconds 19h- 1Fh 1. See Table 5: Key to Table 4: M41T83 clock/control register map (32 2. AF2 will always read ‘0’, if the AL2E bit is set to ‘0’. ( 0.01 seconds seconds Minutes Hours (24 hour format) ...

Page 26

... SQWE SRAM/ALM2 ST TD0, TD1 TE TF TI/TP TIE WDF 26/58 Table 4: M41T83 clock/control register map (32 bytes) Code Must be set to zero Alarm in battery back-up enable bit Alarm interrupt enable bits Analog calibration bits Analog calibration sign bit Alarm flag Alarm 2 enable bit Battery low bit ...

Page 27

Real-time clock accuracy The M41T8x is driven by a quartz controlled oscillator with a nominal frequency of 32,768Hz. The accuracy of the real-time clock is dependent upon the accuracy of the crystal, and the match between the capacitive load ...

Page 28

Clock calibration The M41T8x oscillator is designed for use with a 12.5pF crystal load capacitance. When the calibration circuit is properly employed, accuracy improves to better than ±1 ppm at 25°C. The M41T8x design provides the following two methods ...

Page 29

Table 6. Digital calibration values Calibration value (binary) DC4 – DC0 0 (00000) 1 (00001) 2 (00010) 3 (00011) 4 (00100) 5 (00101) 6 (00110) 7 (00111) 8 (01000) 9 (01001) 10 (01010) 11 (01011) 12 (01100) 13 (01101) 14 ...

Page 30

Analog calibration (programmable load capacitance) A second method of calibration employs the use of programmable internal load capacitors to adjust (or trim) the oscillator frequency. By design, the oscillator is intended ppm ± crystal accuracy at ...

Page 31

Figure 17. Crystal accuracy across temperature Frequency (ppm –20 –40 –60 –80 –100 –120 –140 –160 –40 –30 –20 Table 7. Analog calibration values Analog calibration D7 D6 value Addr ACS AC6 (±) (16pF) 0pF x 0 3pF ...

Page 32

The on-chip capacitance can be calculated as follows: C LOAD For example: ● C (12h = x0000000) = 12.5pF, LOAD ● C (12h =11001000) = 3.5pF, and LOAD ● C (12h = 00100111) = 17.4pF. LOAD The oscillator sees a ...

Page 33

Figure 18. Clock accuracy vs. on-chip load capacitance 100.0 100.0 80.0 80.0 60.0 60.0 40.0 40.0 20.0 20.0 FASTER FASTER 0.0 0.0 SLOWER SLOWER -20.0 -20.0 OFFSET TO OFFSET TO -18.0 -15.0 -18.0 -15 ...

Page 34

... The second approach is better suited to a manufacturing environment, and involves the use of the IRQ1/FT/OUT pin. The IRQ1/FT/ OUT pin will toggle at 512Hz when FT and OUT bits = '1' (M41T83 only) and ST = '0.' Any deviation from 512Hz indicates the degree and direction of oscillator frequency shift at the test temperature. For example, a reading of 512.010124Hz would indicate a +20 ppm oscillator frequency error, requiring either a – ...

Page 35

Figure 20. Crystal isolation example 1. Substrate pad should be tied to V 3.5 Setting the alarm clock registers Address locations 0Ah-0Eh (Alarm 1) and 14h-18h (Alarm 2) contain the alarm settings. Either alarm can be configured independently to go ...

Page 36

Optional second programmable alarm When the Alarm 2 Enable (AL2E) bit (D1 of address 13h) is set to a logic ‘1’, registers 14h through 18h provide control for a second programmable alarm which operates in the same manner as ...

Page 37

Table 8. Alarm repeat modes RPT5 RPT4 3.7 Watchdog timer The watchdog timer can be used to detect an out-of-control microprocessor. The user programs the watchdog timer by ...

Page 38

... At the end of every countdown, the timer sets the Timer Flag (TF) bit. The TF bit can only be cleared by software. When asserted, the timer flag (TF) can also be used to generate an interrupt (IRQ1/FT/OUT) on the M41T83. The interrupt may be generated as a pulsed signal every countdown period permanently active signal which follows the condition of TF ...

Page 39

... The timer will auto-reload and continue to count down regardless of the state of TF bit (or TI/TP bit). The TF bit is cleared by reading the Flags Register. 3.8.3 Timer interrupt enable (TIE, M41T83 only) In Level mode (TI/TP = 0), when TF is asserted, the interrupt is asserted (if TIE = 1). To clear the interrupt, the TF bit or the TIE bit must be reset. ...

Page 40

... Writing to the timer register will not reset the TF bit or clear the interrupt. 3.9 Square wave output The M41T83 offers the user a programmable square wave function which is output on the SQW pin. RS3-RS0 bits located in 13h establish the square wave output frequency. These frequencies are listed in completed, the SQW pin can be turned on and off under software control with the Square Wave Enable bit (SQWE) located in Register 0Ah ...

Page 41

Battery low warning The M41T8x automatically performs battery voltage monitoring upon power-up and at factory-programmed time intervals of approximately 24 hours. The Battery Low (BL) bit, bit D4 of Flags Register 0Fh, will be asserted if the battery voltage ...

Page 42

... The ST bit is set to '1.' ● External interference of the crystal For the M41T83, if the Oscillator Fail Interrupt Enable bit (OFIE) is set to a '1,' the IRQ1/FT/OUT pin will also be activated. The IRQ1/FT/OUT output is cleared by resetting the OFIE or OF bit to '0' (NOT by reading the Flag Register). ...

Page 43

... With battery back-up unchanged. 3.16 OTP bit operation (M41T83 in SOX18 package only) When the OTP (One Time Programmable) bit is set to a '1,' the value in the internal OTP registers will be transferred to the analog calibration register (12h) and are “Read only.” The OTP value is programmed by the manufacturer, and will contain the calibration value necessary to achieve ± ...

Page 44

... These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 17. ...

Page 45

DC and AC parameters This section summarizes the operating and measurement conditions, as well as the dc and ac characteristics of the device. The parameters in the following DC and AC Characteristic tables are derived from tests performed under ...

Page 46

Table 20. DC characteristics Sym Parameter Operating voltage (S) V Operating voltage (R) CC Operating voltage (Z) I Input leakage current LI I Output leakage current LO I Supply current CC1 I Supply current (standby) All inputs V CC2 V ...

Page 47

... C Load capacitance L 1. Externally supplied if using the QFN16 or SO8 package. STMicroelectronics recommends the Citizen CFS- 145 (1.5x5mm) and the KDS DT-38 (3x8mm) for thru-hole, or the KDS DMX-26S (3.2x8mm) or Micro Crystal MS3V-T1R (1.5x5mm) for surface-mount, tuning fork-type quartz crystals. For contact information, see Section 8: References on page 2 ...

Page 48

Figure 25. Power down/up mode AC waveforms tPD SDA SCL Table 23. Power down/up trip points DC characteristics Sym V Reset threshold voltage RST Battery back-up switchover V SO Hysteresis Reset Pulse width ( ...

Page 49

Figure 26. Bus timing requirement sequence SDA tBUF tHD:STA tR SCL P S Table 24. AC characteristics Sym Parameter f SCL clock frequency SCL t Clock low period LOW t Clock high period HIGH t SDA and SCL rise time ...

Page 50

Package mechanical information In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a Lead-free second level interconnect . The category of second Level Interconnect is marked on the package and on the ...

Page 51

Figure 27. QFN16 – 16-lead, quad, flat package, no lead body size outline ddd Drawing is not to scale. Table 25. QFN16 – 16-lead, quad, flat package, no lead ...

Page 52

Figure 28. QFN16 – 16-lead, quad, flat package, no lead mm, recommended footprint 1. Dimensions are shown in millimeters (mm). Figure 29. 32KHz crystal + QFN16 vs. VSOJ20 mechanical data 1. Dimensions shown are in millimeters (mm). ...

Page 53

Figure 30. SOX18 – 18-lead plastic small outline, 300mils, embedded crystal, outline SO-J 1. Drawing is not to scale. Table 26. SOX18 – 18-lead plastic small outline, 300mils, embedded crystal, package mech. millimeters Symbol ...

Page 54

Figure 31. SO8 – 8-lead plastic small package outline A2 1. Drawing is not to scale. Table 27. SO8 – 8-lead plastic small outline (150 mils body width), package mech. data Symb Typ ccc D ...

Page 55

Part numbering Table 28. Ordering information Example: Device family M41T Device type 82 (SO8 package only) 83 Operating voltage 3. 2. ...

Page 56

References Below is a listing of the crystal component suppliers mentioned in this document. ● KDS can be contacted at kouhou@kdsj.co.jp or http://www.kdsj.co.jp. ● Citizen can be contacted at csd@citizen-america.com or http://www.citizencrystal.com. ● Micro Crystal can be contacted at ...

Page 57

Revision history Table 29. Document revision history Date Revision 27-Jul-2006 1 17-Oct-2006 2 19-Dec-2006 3 08-Mar-2007 4 08-May-2007 5 12-Nov-2007 6 Changes First edition Updated package mechanical data in package outline and Table 27: SO8 – 8-lead plastic small ...

Page 58

... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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