max5893egk-d Maxim Integrated Products, Inc., max5893egk-d Datasheet - Page 12

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max5893egk-d

Manufacturer Part Number
max5893egk-d
Description
Max5893 12-bit, 500msps Interpolating And Modulating Dual Dac With Cmos Inputs
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
12-Bit, 500Msps Interpolating and Modulating
Dual DAC with CMOS Inputs
The MAX5893 dual, 500Msps, high-speed, 12-bit, cur-
rent-output DAC provides superior performance in
communication systems requiring low-distortion ana-
log-signal reconstruction. The MAX5893 combines two
DAC cores with 8x/4x/2x/1x programmable digital inter-
polation filters, a digital quadrature modulator, an SPI-
compatible serial interface for programming the device,
and an on-chip 1.20V reference. The full-scale output
current range is programmable from 2mA to 20mA to
optimize power dissipation and gain control.
Each channel contains three selectable interpolating fil-
ters making the MAX5893 capable of 1x, 2x, 4x, or 8x
interpolation, which allows for low-input and high-out-
put data rates. When operating in 8x interpolation
mode, the interpolator increases the DAC conversion
rate by a factor of eight, providing an eight-fold
increase in separation between the reconstructed
waveform spectrum and its first image. The MAX5893
accepts either two’s complement or offset binary input
data format and can operate from either a single- or
dual-port input bus.
The MAX5893 includes modulation modes at f
f
ulator. If 2x interpolation is used, this data rate is 2x the
input data rate. If 4x or 8x interpolation is used, this data
rate is 4x the input data rate. Table 1 summarizes the
modulator operating data rates for dual-port mode.
Table 1. Quadrature Modulator Operating Data Rates (f
the Modulator) for Dual-Port Mode
12
IM
INTERPOLATION RATE
/ 4, where f
______________________________________________________________________________________
1x
2x
4x
8x
IM
is the data rate at the input of the mod-
Detailed Description
MODULATION MODE (f
f
f
f
f
f
f
f
f
IM
IM
IM
IM
IM
IM
IM
IM
/ 2
/ 4
/ 2
/ 4
/ 2
/ 4
/ 2
/ 4
IM
/ 2 and
LO
)
MODULATION FREQUENCY
The power-down modes can be used to turn off each
DAC’s output current or the entire digital section.
Programming both DACs into power-down simultane-
ously will automatically power down the digital interpo-
lator filters. Note the SPI section is always active.
The analog and digital sections of the MAX5893 have
separate power-supply inputs (AV
AV
coupling from one supply to the other. AV
DV
other supply inputs operate from a typical 3.3V supply.
The SPI-compatible serial interface programs the
MAX5893 registers. The serial interface consists of the
CS, SDI, SCLK, and SDO. Data is shifted into SDI on
the rising edge of the SCLK when CS is low. When CS
is high, data presented at SDI is ignored and SDO is in
high-impedance mode. Note: CS must transition high
after each read/write operation. SDO is the serial data
output for reading registers to facilitate easy debug-
ging during development. SDI and SDO can be con-
nected together to form a 3-wire serial interface bus or
remain separate and form a 4-wire SPI bus.
The serial interface supports two-byte transfer in a
communication cycle. The first byte is a control byte
written to the MAX5893 only. The second byte is a data
byte and can be written to or read from the MAX5893.
RELATIVE TO f
CLK
DD1.8
f
f
f
f
f
f
f
f
, DV
DAC
DAC
DAC
DAC
DAC
DAC
DAC
DAC
operate from a typical 1.8V supply, and all
DD3.3
/ 2
/ 4
/ 2
/ 4
/ 2
/ 4
/ 4
/ 8
IM
is the Data Rate at the Input of
DAC
, and DV
DD1.8
MODULATION FREQUENCY
), which minimize noise
RELATIVE TO f
Serial Interface
2 x f
2 x f
f
f
f
DD3.3
DATA
DATA
DATA
f
f
f
DATA
DATA
DATA
DATA
DATA
/ 2
/ 4
/ 2
, AV
DD1.8
DATA
DD1.8
and
,

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