stlc1511 STMicroelectronics, stlc1511 Datasheet - Page 21

• Manufacturer Part Number: stlc1511
• Description: Northenlite?? G.lite Bicmos Analog Front-end Circuit
• Manufacturer: STMicroelectronics

During a transaction, the first bit sent to the AFE de-
termines the type of transaction, R/W=”1” corre-
sponds to a read transaction while R/W=”0”
corresponds to a write transaction. The next three
bits, address[a2:a0], determine which of the 8 AFE
registers will be accessed (Table 8). This is followed
by the 8-bit data word.
In both Read and Write transactions, bit 0 ( LSB ) of
the serially transferred 8-bit word is clocked from the
data source first (the data source being the external
DSP during Write transactions; the STLC1511 during
Read transactions).
The definition of these fields within the 8-bit word is
Table 8. AFE Register Map Summary
[a2:a0]
000
001
010
011
100
101
110
111
Addr
<1>Presently there is no difference in the oscillator driver between Oscillator Mode and CPE modes so this bit is unused. However,
it may be required in the future and should be programmed correctly in case needed.
STLC1511 Control 1 (Rx
PGA Gain)
STLC1511 Control 2 (Tx
PGA Gain)
STLC1511 Control 3
(Power Down Reg)
STLC1511 Control 4
(Misc. Control)
AFE Control 5
(PLL Control)
not used
not used
AFE Status
Name
Rx PGA Gain
not used
not used
not
use
d
not
use
d
not used
not used
not used
D7
DIG-
REF
Ena
ble
D6
FREF Mode
D5
in the control register will be reset as per defined in
the detailed register maps.
For a write operation, the data on the DRX pin is
latched into the STLC1511 on the negative edge of
the DIGCLK signal. The data should change state on
the positive edge of the clock.
For a read operation, the data on the DTX pin is out-
put on the positive edge of the clock on pin DIGCLK.
outlined below in Table 8 and in the detailed register
maps following.
When the voltage on the RESETN pin is low, the bits
Tx PGA Gain
DIV Output
(Test mode)
D4
Rx
Opa
mp
Pow
er
Dow
n
PLL
Mod
e
D3
not
use
d
PLL
PFD
inpu
t sel
Osc
Mod
e
D2
1
Rx
Pow
er
Dow
n
Tx
Loo
p
back
Clock Source
Control
D1
Tx
Pow
er
Dow
n
Clip
Indic
ator
ena
ble
Clip
Stat
us
D0
STLC1511
RW
RW
RW
RW
R/W
R
Type
21/31