cs5520-bp Cirrus Logic, Inc., cs5520-bp Datasheet
cs5520-bp
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cs5520-bp Summary of contents
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... Sps. The CS5520 achieves 20-bit resolution at output word rates Sps. The CS5516 and CS5520 sample at a rate set by the user in the form of either an external CMOS clock or a crystal. On-chip digital filtering provides rejection of all frequencies above 12 Hz for a 4 ...
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... Notes: 1. The AIN and VREF pins present a very high input resistance at dc and a minor dynamic load which scales to the master clock frequency. Both source resistance and shunt capacitance are therefore critical in determining the source impedance requirements of the CS5516 and CS5520 at these pins. 2. Applies after system calibration at the temperature of interest. ...
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... DS74F2 (continued) (Note 2) (Note 2) (Note 2) (Note 2) Gain = 25 ( Gain = 50 ( Gain = 100 ( Gain = 200 ( ppm FS 0.0000238 0.25 0.0000477 0.50 0.0000954 1.0 0.0001907 2.0 0.0003814 4.0 VREF = 2.5V CS5520; 20-Bit Unit Conversion Factors CS5520 Min Typ Max -40 to +85 - 0.0007 0.0015 ...
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... Min Unipolar Bipolar 12.5, 25, 50, 100 (Note (Note 3) - (Note (Note (Note (Note 1) - CS5516, CS5520 Typ Max Units -40 to +85 C 12.5, 25, 50, 100 mV mV 165 - dB 200 - 100 - 200 - kHz 5 - MHz 1 sec 100 - nVrms 120 - ...
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... (Note 7) Normal Operation - Standby Mode - Positive Supplies - Negative Supplies - (Note 8) Unipolar Mode 0.8T Bipolar Mode 0.8T (Note 8) Unipolar Mode -2T Bipolar Mode -2T (Notes 10) Unipolar Mode Bipolar CS5516, CS5520 Typ Max Units 3. 100 100 - ppm/ C 0 2.7 3 ...
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... XIN V IH All Pins Except XIN V IH XIN V IL All Pins Except XIN V IL (Note 11) V (VD+)-1 out = 1.6mA out CS5516, CS5520 Ratio Units f /128 Hz clk f /256 Hz clk f /81,920 Sps clk f /341,334 Hz clk 6/f s out 5%; VA-, VD- = -5V 5%; Min Typ ...
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... Bipolar Notes: 12. All voltages with respect to ground. 13. The CS5516 and CS5520 can accept input voltages unipolar mode and - bipolar mode where T=VREF/(Gx25 the gain setting at the second gain block. When the inputs exceed these values, the CS5516 and CS5520 will output positive full scale for any input above T, and negative full scale for inputs below AGND in unipolar and -T in bipolar mode ...
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... SID Write Timing (Not to Scale) MSB MSB SOD Read Timing (Not to Scale) MSB SOD Read Timing with (Not to Scale with Continuous SCLK (Not to Scale) CS5516, CS5520 LSB LSB DS74F2 ...
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... SCLK - t 200 1 t 200 2 t 150 150 150 15 CS5516, CS5520 5%; Typ Max Units 4.096 5.0 MHz - 1 1 100 - 2.4 MHz - - ...
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... GENERAL DESCRIPTION The CS5516 and CS5520 are monolithic CMOS A/D converters which include an instrumentation amplifier input, an on-chip programmable gain amplifier, and a DAC for offset trimming. While the devices are optimized for ratiometric measurement of Wheatstone bridge applications, they can be used for general purpose low-level signal measurement ...
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... THEORY OF OPERATION The front page of this data sheet illustrates the block diagram of the CS5516 and CS5520 A/D converter. The device includes an instrumenta- tion amplifier with a fixed gain of 25. This chopper-stabilized instrumentation amplifier is followed by a programmable gain stage with gain settings and 8. The sensitivity of ...
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... Not Used 0 Not Used 0 Not Used Table 1. CS5516 and CS5520 Commands ter to be read, and present its 24-bit word to the port. The microcontroller will signal when the 24-bit read data is available by causing the DRDY pin to go low. The user must write or read the full 24-bit word except in the case of reading conversion data ...
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... Calibrate ratiometric offset, AIN 0001 Calibrate gain, AIN 0 Must always be logic Must always be logic 0 0 Must always be logic Normal operation R 1 Reset Filter Table 2. Configuration Register CS5516, CS5520 D17 D16 D15 D14 D13 F0 D16 ...
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... System Initialization Whenever power is applied CS5516/CS5520 A/D converters, the devices must be reset to a known condition before proper operation can occur. The internal reset is applied after power is established and lasts for approximately 100 ms. The RST pin can also be used to establish a reset condition. The reset sig- nal should remain low for at least one XIN clock cycle to ensure adequate reset time ...
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... VREF & AIN Non-ratiometric Offset X X End Calibration Table 3. CS5516/CS5520 Calibration Control formed. The calibration steps should be per- formed in the following sequence. If the user determines that non-ratiometric offset calibra- tion is important, the non-ratiometric offset errors of the VREF and AIN input channels should be calibrated first ...
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... EC and CC0 bits of the configuration register are set to logic 1. The gain calibration of the AIN channel is the final calibration step. After 16 16 CS5516, CS5520 DRDY falls to signal the completion of this cali- bration step, the EC bit of the configuration register must be set back to logic 0 to terminate the calibration mode. ...
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... DS74F1 DS74F2 In a typical weigh scale application, the CS5516/CS5520 will be calibrated in combina- tion with a load cell at the factory. Once calibrated, the calibration words are off-loaded from the converter and stored in E When powered-up in the field the calibration ...
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... These bits mirror the R Configuration Register - -23 ). After Reset the MSB=1, all other bits are 0. Table 4. Calibration Registers CS5516, CS5520 -18 -19 -20 - D17 D16 D15 D14 D13 F0 D16 ...
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... After writ- ing the command word, the user must pause and wait until the CS5520 presents the selected reg- ister data to the serial port. The DRDY signal will fall when the data is available. When read- ...
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... Data Time 24 SCLKs SID Write MSB SOD Read ( Wire SCLKs Clear DRDY SOD Read (3 Wire) Figure 4. Command and Data Word Timing CS5516, CS5520 LSB LSB Data Time 24 SCLKs 81,920 XIN Clock Cycles MSB LSB SOD falls if Data Time Command ...
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... Wheatstone bridge applications. The converters support either (switched dc) bridge excitation. DC Bridge Excitation The CS5516/CS5520 can be configured for dc bridge excitation in either of two ways. The EXC bit of the configuration register can be set for either internal or for external excitation. If set to internally-controlled mode (EXC = 0), the F1 and F0 bits must be set to logic 0s ...
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... To excite the bridge dynamically requires some type of bridge driver external to the CS5516/CS5520 converter. This driver is driven by a square wave clock. The source of this clock depends upon whether the converter is set for internal excita- tion or for external excitation ...
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... MDVR and its tempco are not important when the CS5516/20 is used in the ratiometric measurement mode. The voltage ref- erence output, MDVR-, should be decoupled using capacitor which is connected to the MDRV+ supply line. Voltage reference decou- CS5516, CS5520 VREF+ VREF- CS5516 or CS5520 ...
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... XIN clock rate and is set by the ratio of 3Hz mini- XIN/81,920 Sps for XIN = 4.096 MHz. If very narrow signal bandwidths, such as 3 Hz, are desired, averaging of the output words is rec- ommended. CS5516, CS5520 (1) XIN = 3.579 MHz (2) XIN = 4.096 MHz (3) XIN = 4.915 MHz 21.8 43.7 87 ...
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... SCLK advance the data word to the next lower bit. The output conversion words from both the CS5516 and the CS5520 are 24 bits long. The CS5516 has 16 data bits followed by 8 flag bits (all identical). The CS5520 has 20 data bits fol- lowed by 4 flag bits (all identical). To read the ...
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... Typical noise performance for the converter is listed in the specification tables for each PGA gain. Figure 13 illustrates a noise histogram for 1000 output conversions from the CS5520. The data for the histogram was collected using the CDB5520 evaluation board; with VREF at 2.5 volts, PGA = 4, bipolar mode. The data shows the standard deviation of the data set is 3 ...
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... SCLK 9 16 VREF- DRDY 10 15 BX2 BX1 RST 12 13 CS5516, CS5520 Serial Interface Mode Crystal Out Crystal In Negative Digital Power Positive Digital Power Digital Ground Serial Output Data Serial Input Data Serial Clock Input Data Ready Chip Select Reset 27 27 ...
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... Positive terminal of the internal differential voltage reference which can be tied to the positive supply (VA+) or ground (AGND). MDRV- - Modulator Differential Voltage Reference, PIN 2. This is the -3.75V modulator differential voltage reference output and can be used to generate an analog reference. Note this is with reference to the MDRV+ pin CS5516, CS5520 DS74F2 DS74F1 ...
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... CS5520-BS CS5520-BP 24-pin Plastic DIP CS5520-BS CS5520-BSZ (lead free) ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION Model Number CS5516-AP CS5516-AS CS5516-ASZ (lead free) CS5520-BP CS5520-BS CS5520-BSZ (lead free) * MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020. DS74F1 DS74F2 Liearity Package Resolution Error Temperature Range ...
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... Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners LSB beyond the code transition to all ones, passing through a point 2 www.cirrus.com CS5516, CS5520 3 LSB]. Units 2 1 LSB above AGND) when ...
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... FAX: (512) 445 7581 http://www.crystal.com Description The CDB5516 and CDB5520 provide quick and easy evaluation of the CS5516 and CS5520 bridge transducer A/D converters. Direct connection of the bridge to the evaluation board is provided. The board also contains a microcontroller, with firmware ...
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... PC-compatible computer via an RS-232 port. Software is sup- plied with the board which provides control of all registers in the CS5516 or the CS5520. The board is configured to be operated from +5 and -5 volt power supplies. A bridge transducer or a bridge transducer simulator is required if the board evaluated in the ratiometric oper- ating mode ...
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... A bridge driver, composed of a Siliconix TP0610 transistor and a Micrel MIC4428 dual CMOS driver, is provided which allows the BX2 output from the CS5516 or CS5520 to provide either excitation to the bridge. The digital interface pins of the A/D converter connect to the microcontroller, or alternatively, these connections can be cut, or the on-board microcontroller can be removed, and the user’ ...
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... Prior to using the board to evaluate the CS5516 or CS5520 A/D converter, a good understanding of the full potential of the converter is necessary recommended that the CS5516/CS5520 de- vice data sheet be thoroughly read prior to attemp ting the ev aluation board. The CS5516 or CS5520 bridge transducer A/D converter actually contains two A/D converters. + AGND ...
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... A/D converter operates in ratiometric measure- ment mode. Figures 4 and 5 illustrate how to connect 4-wire and 6-wire bridge transducers to the board. Alternatively, the CS5516 or CS5520 can be configured for absolute measurement if a preci- sion reference voltage is supplied between the VREF+ and VREF- pins of the A/D converter. ...
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... It may be desirable to also remove R5, R7, C16, and C17 in some applications. Calibrating the A/D Converter As explained in the CS5516/CS5520 data sheet, the order in which the calibration steps are per- formed are important. If one chooses to use the non-ratiometric calibration capabilities of the ...
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Figure 7 illustrates the software supplied with the CDB5516/CDB5520 evaluation board. The software allows the user to manipulate the regis- ters of the converter and perform calibrations and conversions. It decodes the status of the con- figuration register and indicates ...
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Figure 8. CDB5520 Silkscreen CDB5516/CDB5520 DS74DB4 DS74DB3 ...
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DS74DB4 DS74DB3 Figure 9. CDB5520 Top Ground Plane CDB5516/CDB5520 39 39 ...
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Figure 10. CDB5520 Solder Side Trace Layer CDB5516/CDB5520 DS74DB4 DS74DB3 ...
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... AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES. Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. ...