ad1812 Analog Devices, Inc., ad1812 Datasheet
ad1812
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ad1812 Summary of contents
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... The AD1812 SoundPort® Controller is a single chip audio sub- system for adding 16-bit stereo audio to personal computers. The AD1812 is compatible with Sound Blaster Pro, AdLib, and the Microsoft* Windows Sound System. The AD1812 provides an integrated audio solution for enhanced business audio, enter- tainment sound effects, and multimedia applications ...
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... AD1812–SPECIFICATIONS STANDARD TEST CONDITIONS UNLESS OTHERWISE NOTED Temperature 0 Digital Supply (V ) 5.0 DD Analog Supply (V ) 5.0 CC Sample Rate ( Input Signal 1008 Analog Output Passband kHz 0.4 OL ANALOG INPUT Parameter Input Voltage (RMS Values Assume Sine Wave Input) ...
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... Step Size (–22 –94.5 dB)* Digital Mix Attenuation Range Span* *Guaranteed not tested. Specifications subject to change without notice. REV. 0 Min 80 Min 74 to 100 kHz kHz)* S Min 1.3 1.0 93.5 Min 1.3 1.0 93.5 –3– AD1812 Typ Max Units 16 Bits 86 dB 0.02 % –78 – –90 –80 dB –90 –80 dB –90 – ...
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... AD1812 ANALOG OUTPUT Parameter Full-Scale Output Voltage Output Impedance* External Load Impedance Output Capacitance* External Load Capacitance V REF V Output Impedance REF Mute Click (Muted Output Minus Unmuted Midscale DAC Output)* SYSTEM SPECIFICATIONS Parameter System Frequency Response Ripple* (Line In to Line Out) ...
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... PC_D (15:0) t ADHD PC_A (15:0) Figure 2. PIO Write Cycle DRQ ( DKHD3 DACK ( AEHD AEN IOW t DHD1 PC_D (7:0) / PC_D (15:0) Figure 4. DMA Write Cycle –5– AD1812 Typ Max Units ...
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... Sample 1 Big Endian Left Channel Stereo, 16-Bit Lower 8 Bits of Sample 0 Big Endian Right Channel *Regardless of the data format used, the AD1812’s codec always transfers 32 bits of data (two 16-bit words). LSB Lower 8 Bits of Sample 1 Left Channel Lower 8 Bits of Sample 0 Right Channel ...
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... Sample 1 Big Endian Left Channel Stereo, 16-Bit Upper 8 Bits of Sample 0 Big Endian Right Channel *Regardless of the data format used, the AD1812’s codec always transfers 32 bits of data (two 16-bit words). REV. 0 Word 1 (16-Bit) LSB Upper 8 Bits of Sample 1 Left Channel Upper 8 Bits of ...
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... Mono, 16-Bit Sample 1 Big Endian Left Channel Lower 8 Bits of Stereo, 16-Bit Sample 0 Big Endian Right Channel *Regardless of the data format used, the AD1812’s codec always transfers 32 bits of data (two 16-bit words). IOR/IOW DATA (7:0) Byte 2 MSB LSB MSB Lower 8 Bits of Sample 1 ...
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... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD1812 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...
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... I/O Description I/O ISA Bus PC Data. PC_D15 to PC_D8 in conjunction with an active HI SBHE connects the AD1812 to the high byte data on the bus, while PC_D7 to PC_D0 connects to the low byte data on the bus. O Interrupt Request. IRQ ( 10, 11, 12). Active HI signals indicating a pending interrupt. ...
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... TXD MIDI Output. I/O Description I Plug and Play Select. When this pin is asserted (HI), the Plug and Play mode is enabled. If PnP is LO, the AD1812 operates in legacy mode, and the Plug and Play configuration is disabled. O 14.31818 MHz Crystal Output. I 14.31818 MHz Clock Input, can be OSC from the ISA bus. ...
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... The AD1812 is fully configurable according to the Plug and Play ISA specification non-Plug and Play environment, the built in Plug and Play protocol can be disabled. When Plug and Play is disabled, the AD1812 operates under a fixed address space. Table IV. Emulated Logical Devices Logical ...
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... MODEM_SEL pin. Interrupts generated by the external modem are handled on the MODEM_IRQ pin, converted to the assigned system interrupt by the AD1812, and posted to the ISA bus. The modem inter- face operates in a PnP or non-PnP enabled system. PLUG AND PLAY (PnP) The AD1812 can be used under PnP control non-PnP mode ...
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... IRQ Level Select 0x70 IRQ Type Select 0x71 Description Power-Down Control The AD1812 contains two levels of Power-Down control. One on selected I/O range. level of control is accessed through the embedded codec registers and another is accessed via the PnP vendor defined registers. The codec registers allow sections of the embedded codec to be turned off to conserve power. – ...
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... CODEC CONTROL REGISTER ARCHITECTURE Upon Plug and Play initialization, a base address is assigned for the Windows Sound System Compatible logical device embed- ded in the AD1812. The AD1812 accepts both data and con- trol information through the 16-bit interface. Table XVI. Codec Direct Register Map ...
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... AD1812 A detailed map of all direct and indirect register contents is summarized for reference as follows: Table XVIII. Codec Direct Registers (16-Bit Interface) Direct Address Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 WSS Base res res res WSS Base+2 res res res WSS Base+4 ...
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... SYSTEM TIMING AND CONTROL If the AD1812 is not connected directly to the OSC clock on the ISA bus, a single fundamental-mode and parallel-tuned 14.31818 MHz crystal oscillator can be substituted to derive all timing parameters. Future feature enhanced, pin-compatible versions of the SoundPort Controller will require a 33 MHz clock or crystal input ...
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... AD1812 INDEX FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 PRODUCT OVERVIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 AD1812–SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 ANALOG INPUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 PROGRAMMABLE GAIN AMPLIFIER—ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 AUXILIARY, LINE, MICROPHONE AND MONO INPUT ANALOG GAIN/AMPLIFIERS/ATTENUATORS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 DIGITAL DECIMATION AND INTERPOLATION FILTERS . . . . . . . . . . . . . . 2 ANALOG-TO-DIGITAL CONVERTERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 DIGITAL-TO-ANALOG CONVERTERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 DAC ATTENUATOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 DIGITAL MIX ATTENUATOR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 ANALOG OUTPUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 SYSTEM SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 STATIC DIGITAL SPECIFICATIONS ...
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... TQFP (ST-160) 1.031 (26.20) 1.016 (25.80) 0.063 (1.60) 0.949 (24.10) MAX 0.941 (23.90 160 1 PIN TOP VIEW (PINS DOWN) SEATING PLANE 12 0.003 (0.08) 40 TYP 41 MAX 0.006 (0.15) 0.010 (0.25) 0.002 (0.05) 0.006 (0.15) 0.057 (1.45) 0.053 (1.35) –19– AD1812 0.030 (0.75) 0.022 (0.55 121 120 81 80 0.020 (0.50) BSC ...
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