CY28325 Cypress Semiconductor Corp., CY28325 Datasheet - Page 9

• Manufacturer Part Number: CY28325
• Description: FTG For Via Pentium 4 Chipsets
• Manufacturer: Cypress Semiconductor Corp.

Data Byte 9 (continued)
Data Byte 10
Document #: 38-07119 Rev. **
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit
Bit
Pin#
Pin#
–
–
–
–
–
–
–
–
–
–
–
–
RST_EN_FC
WD_TO_STAT
US
WD_EN
Reserved
CPU_CS_F Skew2
CPU_CS_F Skew1
CPU_CS_F Skew0
CPU_Skew2
CPU_Skew1
CPU_Skew0
AGP_Skew1
AGP_Skew0
Name
Name
PRELIMINARY
This bit will enable the generation of a Reset pulse after a frequency
change occurs.
0 = Disabled
1 = Enabled
Watchdog Timer Time-out Status Bit
0 = No time-out occurs (Read); Ignore (Write)
1 = time-out occurred (Read); Clear WD_TO_STATUS (Write)
0 = Stop and re-load Watchdog timer
1 = Enable Watchdog timer. It will start counting down after a frequency
change occurs.
Note: CY28325-2 will generate system reset, re-load a recovery
frequency, and lock itself into a recovery frequency mode after a Watchdog
timer time-out occurs. Under recovery frequency mode, CY28325-2 will
not respond to any attempt to change output frequency via the SMBus
control bytes. System software can unlock W305B from its recovery
frequency mode by clearing the WD_EN bit.
Reserved
000 = Normal
001 = –150 ps
010 = –300 ps
011 = –450 ps
100 = +150 ps
101 = +300 ps
110 = +450 ps
111 = +600 ps
CPUT_0:1 and CPUC_0:1 Skew Control
000 = Normal
001 = –150 ps
010 = –300 ps
011 = –450 ps
100 = +150 ps
101 = +300 ps
110 = +450 ps
111 = +600 ps
AGP Skew control
00 = Normal
01 = –150 ps
10 = +150 ps
11 = +300 ps
CPU_CS_F Skew Control
Pin Description
Pin Description
CY28325-2
Page 9 of 19
Power-on
Power-on
Default
Default
0
0
0
0
0
0
0
0
0
0
0
0