uda1344ts-n2 NXP Semiconductors, uda1344ts-n2 Datasheet - Page 13

no-image

uda1344ts-n2

Manufacturer Part Number
uda1344ts-n2
Description
Low-voltage Low-power Stereo Audio Codec With Dsp Features
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
L3 interface registers
When the data transfer of type ‘status’ is selected, the features system clock frequency, data input format and DC filter
can be controlled.
Table 14 Data transfer of type ‘status’
When the data transfer of type ‘data’ is selected, the features volume, bass boost, treble, de-emphasis, mute, mode and
power control can be controlled.
Table 15 Data transfer of type ‘data’
2001 Jun 29
handbook, full pagewidth
BIT 7
BIT 7
Low-voltage low-power stereo audio
CODEC with DSP features
0
0
0
1
1
BIT 6
BIT 6
0
0
1
0
1
L3CLOCK
L3MODE
BIT 5
BIT 5
L3DATA
SC1
VC5
BB3
0
0
BIT 4
BIT 4
SC0
VC4
DE1
BB2
0
BIT 3
BIT 3
VC3
DE0
BB1
IF2
address
0
BIT 2
BIT 2
VC2
BB0
IF1
MT
Fig.6 Multibyte data transfer.
0
data byte #1
BIT 1
BIT 1
VC1
PC1
TR1
IF0
M1
13
BIT 0
BIT 0
VC0
TR0
PC0
DC
M0
t stp(L3)
data byte #2
SC = system clock frequency (2 bits); see Table 16
IF = data input format (3 bits); see Table 17
DC = DC filter (1 bit); see Table 18
VC = volume control (6 bits); see Table 19
BB = bass boost (4 bits); see Table 20
TR = treble (2 bits); see Table 21
DE = de-emphasis (2 bits); see Table 22
MT = mute (1 bit); see Table 23
M = filter mode (2 bits); see Table 24
PC = power control (2 bits); see Table 25
REGISTER SELECTED
REGISTER SELECTED
address
MGL725
UDA1344TS
Product specification

Related parts for uda1344ts-n2