uda1342ts-n1 NXP Semiconductors, uda1342ts-n1 Datasheet
uda1342ts-n1
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uda1342ts-n1 Summary of contents
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... DATA SHEET UDA1342TS Audio CODEC Product specification Supersedes data of 2000 Mar 29 File under Integrated Circuits, IC01 INTEGRATED CIRCUITS 2000 Jul 31 ...
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... TIMING 17 APPLICATION INFORMATION 18 PACKAGE OUTLINE 19 SOLDERING 19.1 Introduction to soldering surface mount packages 19.2 Reflow soldering 19.3 Wave soldering 19.4 Manual soldering 19.5 Suitability of surface mount IC packages for wave and reflow soldering methods 20 DATA SHEET STATUS 21 DEFINITIONS 22 DISCLAIMERS 23 PURCHASE OF PHILIPS I 2 Product specification UDA1342TS 2 C COMPONENTS ...
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... The device also supports a combination of the MSB-justified output format and the LSB-justified input format. The UDA1342TS has special sound processing features in the playback mode such as de-emphasis, volume, mute, bass boost and treble, which can be controlled by the microcontroller via the L3-bus Product specifi ...
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... A-weighted normal mode = 96 kHz dB; A-weighted = 48 kHz normal mode A-weighted i double differential mode A-weighted kHz normal mode A-weighted i 4 Product specification UDA1342TS MIN. TYP. MAX. UNIT 2.7 3.0 3.6 V 2.7 3.0 3.6 V 2.7 3.0 3.6 V 10.0 mA 20.0 mA 200 A 6.0 mA ...
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... A-weighted kHz at 60 dB; A-weighted kHz code = 0; A-weighted kHz code = 0; A-weighted s PACKAGE DESCRIPTION plastic shrink small outline package; 28 leads; body width 5 Product specification UDA1342TS MIN. TYP. MAX. UNIT 0 100 dB 99 ...
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... ADC DECIMATION FILTER DIGITAL MIXER (ADC) DC-CANCELLATION FILTER DIGITAL INTERFACE DIGITAL MIXER (DAC) DSP FEATURES INTERPOLATION FILTER NOISE SHAPER DAC DAC ref Fig.1 Block diagram. 6 Product specification UDA1342TS V ADCP V ADCN VINR2 PGA 4 VINR1 PGA 9 IPSEL 22 STATUS 23 QMUTE 13 L3MODE ...
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... L3-bus/I general purpose output quick mute input DAC output right DAC analog supply voltage DAC output left DAC analog ground reference voltage for ADC and DAC 7 Product specification UDA1342TS DESCRIPTION , 384f , 512f or 768f C-bus clock input or clock selection ...
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... MGT017 Fig.2 Pin configuration. 8 FUNCTIONAL DESCRIPTION 8.1 System clock The UDA1342TS operates in slave mode only, this means that in all applications the system must provide the system clock. The system clock frequency is selectable and depends on the mode of operation: 2 L3-bus/I C-bus mode: 256f , 384f ...
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... Audio CODEC 8.2.2 D OUBLE DIFFERENTIAL MODE Since the UDA1342TS is equipped with two stereo ADCs, these two pairs of stereo ADCs can be used to convert a single stereo signal to a signal with a higher performance by using the ADCs in the double differential mode. This mode and the input signals, being channel ...
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... AND MUTE TREBLE Fig.5 Digital mixer (DAC). 8.10 Digital interface . It shifts The UDA1342TS supports the following data input/output s formats for the various modes (see Fig.6). L3-bus and S-bus format with data word length bits MSB-justified serial format with data word length ...
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Acrobat reader. white to force landscape pages to be ... LEFT BCK DATA MSB B2 MSB 2 ...
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... MHz (768 44.1 kHz) 8.12 Power-on reset The UDA1342TS has an internal Power-on reset circuit (see Fig.7) which resets the test control block. All the digital sound processing features and the system controlling features are set to their default setting in the 2 L3-bus and I C-bus mode ...
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... L3CLOCK L3MODE L3DATA QMUTE SELECTION IPSEL L3-bus mode 2 I C-bus mode All features in the L3-bus and I static pin mode in Sections 8.15 and 8.16. 13 Product specification UDA1342TS MGU002 Pin function in the selected mode FUNCTION 2 L3-BUS I C-BUS MODE MODE L3CLOCK SCL clock select ...
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... L3DATA: microcontroller interface data line L3MODE: microcontroller interface mode line L3CLOCK: microcontroller interface clock line. The UDA1342TS acts as a slave receiver or a slave transmitter. Therefore L3CLOCK and L3MODE lines transfer only input data and the L3DATA line transfers bidirectional data. ...
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... R/W 1 IPSEL 0 1 The UDA1342TS can be set to different addresses (00 1000 or 10 1000) by setting pin IPSEL to HIGH or LOW level. In the event that the device receives a different address, it will deselect its microcontroller interface logic. Basically, 2 types of data transfer can be defined: data transfer to the device and data transfer from the device (see Table 11) ...
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... BIT 2 BIT IPSEL IPSEL 0 0 D15 D14 D13 D12 Product specification UDA1342TS LAST IN TIME BIT 4 BIT 5 BIT 6 BIT D11 D10 LAST IN TIME BIT 4 BIT 5 BIT 6 BIT 7 1 ...
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Acrobat reader. white to force landscape pages to be ... L3 wake-up pulse after power-up L3CLOCK L3MODE device address L3DATA 0 1 DOM bits ...
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... START procedure (S). 8.16.2 S LAVE ADDRESS The UDA1342TS acts as a slave receiver or a slave transmitter. Therefore, the clock signal SCL is only an input signal. The data signal SDA is an input or output signal (bidirectional line). The UDA1342TS slave address format is shown in Table 15 ...
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... The first byte (8 bits) contains the device address 0011 01X and a write command (bit R/W = 0). 3. This is followed by an acknowledge (A) from the UDA1342TS. 4. The microcontroller then writes the register address (8 bits) where writing of the register content of the UDA1342TS must start. 5. The UDA1342TS acknowledges this register address. ...
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... Again the device address 0011 01X is given, but this time followed by a read command (bit R/W = 1). 8. The UDA1342TS sends the two-byte data with the Most Significant Data (MSD) byte first and then the Least Significant Data (LSD) byte, where each byte is acknowledged by the microcontroller (master). ...
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Acrobat reader. white to force landscape pages to be ... 9 REGISTER MAPPING The addresses of the control registers with default values at Power-on ...
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... System clock frequency A 2-bit value to select the external clock frequency. Table 26 System clock frequency settings SC1 Product specification UDA1342TS FUNCTION 0 ADC power-off 1 input 1 select (input 2 off) 0 input 2 select (input 1 off) 1 not used 0 channel swap and signal inversion 1 ...
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... A 1-bit value to enable the digital mixer of the DAC. Table 31 DAC mixer SAMPLING ADC FREQUENCY 16 to 110 kHz supported 32 to 220 kHz not supported 64 to 440 kHz not supported 23 Product specification UDA1342TS DAC polarity PDA FUNCTION 0 non-inverting 1 inverting DAC mixing position switch MPS FUNCTION 0 before sound features ...
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... The default value is 00. Table 37 Treble settings TR1 TR0 FLAT Product specification UDA1342TS BASS BOOST (dB) FLAT MIN. MAX ...
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... Table 42 ADC input amplifier gain settings IA3 IB3 FUNCTION = 32 kHz s = 44.1 kHz kHz kHz s 25 Product specification UDA1342TS ADC input amplifier gain IA2 IA1 IA0 AMPLIFIER GAIN (dB) IB2 IB1 IB0 ...
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... VA4 VA3 VA2 VA1 VB4 VB3 VB2 VB1 Product specification UDA1342TS dB in steps of 0.25 dB. VL0 VOLUME (dB) VR0 49. 49 49. 50 ...
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... Product specification UDA1342TS VA0 VOLUME (dB) VB0 43 steps of 0.5 dB. MA0 MIXER GAIN (dB) MB0 0 0 +24.0 ...
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... note 4 amb DD output short-circuited to V output short-circuited to V CONDITIONS = all voltages measured with respect to ground; unless amb L CONDITIONS 28 Product specification UDA1342TS MIN. MAX. 4 150 65 +125 40 +85 1100 +1100 250 +250 - 200 450 SSA(DAC) 325 ...
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... DAC power-down operating ADC power-down DAC power-down with respect to V SSA(ADC) note 2 ref (THD + N)/S < 0.1% note 3 . resistor must be connected in series with the DAC output in 29 Product specification UDA1342TS MIN. TYP. MAX 200 6.0 250 9.0 4.5 5.5 2.0 5.5 0.5 +0 0.85V DDD 0.4 ...
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... A-weighted 30 Product specification UDA1342TS = all voltages measured with respect L MIN. TYP. MAX. 900 640 450 320 225 160 122 ...
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... V ripple ripple (FS) digital input dB; A-weighted = 48 kHz dB; A-weighted = 96 kHz s code = 0; A-weighted code = 0; A-weighted kHz; V ripple ripple 31 Product specification UDA1342TS MIN. TYP 100 101 99 100 = 30 mV (p-p) 30 0.9 <0 100 99 100 ...
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... MHz 0.3T sys f 19.2 MHz 0.4T sys T = sample cy(s) frequency cycle time note 2 note 2 note 3 500 250 250 190 190 190 190 32 Product specification UDA1342TS TYP. MAX. UNIT 81 250 ns 54 170 ns 41 130 0.7T ns sys sys 0.6T ns sys sys 0.7T ns sys sys 0.6T ns ...
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... To be suppressed by the input filter. 2000 Jul 31 CONDITIONS MIN. 190 190 30 50 360 380 50 0 1.3 0.6 note 0.1C note 0.1C note 5 0.6 0.6 0.6 1.3 100 0 note Product specification UDA1342TS TYP. MAX. UNIT 400 kHz s s 300 ns b 300 ...
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... WS t BCKH t r BCK T cy(BCK) DATAO DATAI 2000 Jul 31 t CWL T sys Fig.11 Timing of system clock. t h(WS su(WS) t BCKL t d(DATAO-WS) Fig.12 Serial interface input data timing. 34 Product specification UDA1342TS MGR984 t d(DATAO-BCK) t h(DATAO) t su(DATAI) t h(DATAI) MGS756 ...
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... Fig.14 Timing of data transfer mode for write and read. 2000 Jul 31 t CLK(L3)L t CLK(L3)H t su(L3)A t su(L3)DA t h(L3)DA BIT 0 Fig.13 Timing of address mode. t CLK(L3)L t CLK(L3)H t su(L3)DA t h(L3)DA BIT 0 t h(L3)R 35 Product specification UDA1342TS t su(L3)A t h(L3)A T cy(CLK)(L3) BIT 7 t stp(L3) t h(L3)D T cy(CLK)L3 BIT 7 t dis(L3)R t su(L3)R MGU015 MGL723 ...
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Acrobat reader. white to force landscape pages to be ... SDA t BUF t LOW t r SCL t HD;STA t HD;DAT P S ...
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... UDA1342TS VINL2 6 VINR2 8 L3MODE 13 L3CLOCK 14 L3DATA SSD C21 100 nF ( 100 F (16 V) Fig.16 Application diagram. 37 Product specification UDA1342TS R17 R15 220 1 C9 100 F (16 V) C22 100 nF ( ADCP V SSA(DAC) V DDA(DAC ref 28 C20 100 nF ( ...
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... 2.5 scale (1) ( 0.38 0.20 10.4 5.4 7.9 0.65 0.25 0.09 10.0 5.2 7.6 REFERENCES JEDEC EIAJ MO-150 detail 1.03 0.9 1.25 0.2 0.13 0.63 0.7 EUROPEAN PROJECTION Product specification UDA1342TS SOT341 ( 1.1 8 0.1 o 0.7 0 ISSUE DATE 95-02-04 99-12-27 ...
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... Use a low voltage ( less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 39 Product specification UDA1342TS ...
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... Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2000 Jul 31 SOLDERING METHOD WAVE not suitable (2) not suitable suitable (3)(4) not recommended (5) not recommended 40 Product specification UDA1342TS (1) REFLOW suitable suitable suitable suitable suitable ...
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... C COMPONENTS 2 C components conveys a license under the Philips’ system provided the system conforms to the I 41 Product specification UDA1342TS (1) DEFINITIONS These products are not Philips Semiconductors 2 C patent to use the 2 C specification defined by ...
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... Philips Semiconductors Audio CODEC 2000 Jul 31 NOTES 42 Product specification UDA1342TS ...
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... Philips Semiconductors Audio CODEC 2000 Jul 31 NOTES 43 Product specification UDA1342TS ...
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Philips Semiconductors – a worldwide company Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. + 101 ...