as8510 austriamicrosystems, as8510 Datasheet - Page 21

• Manufacturer Part Number: as8510
• Description: Data Acquisition Device For Battery Sensors
• Manufacturer: austriamicrosystems

AS8510
Datasheet - D e t a i l e d D e s c r i p t i o n
7.4.3 Standby Mode1 (SBM1)
The low-power Standby Mode can be entered only through the STOP state. Transition to SBM1 mode occurs when the “START BIT” D0 of Mode
Control register MOD_CTL_REG in
with the time of Ta. An interrupt signal is generated on INT at the rate of Ta secs., and with a pulse width of eight cycles of lp_clk. The data is
stable up to the next interrupt. The functionality is illustrated in Figure. During the period of Ta, only one data sample is made available and,
during the rest of the period, the device is maintained in STOP state to reduce power consumption. The microcontroller which receives the data
on the Interrupt, is also expected to be processing the data for a short time as shown clearly in the
consumption of the data acquisition and processing system.
Figure 7. Standby Mode 1
7.4.4 Standby Mode2 (SBM2)
Standby Mode 2 is an extension of the Standby Mode1 to achieve even a lower power in the data acquisition system by providing interrupt to the
microcontroller only when the data sample exceeds the set current threshold. The Standby Mode can be entered only through the STOP state.
Transition to SBM2 mode occurs when the “START BIT” D0 of Mode Control register MOD_CTL_REG in
Bits D7,D6 to “1,1” through SPI. In this mode the date rate is programmable with the time of Ta in the Ta control registers B, C. The data sample
is made available and an interrupt signal is generated on INT pin only when the input signal exceeds the threshold set in Current Threshold
Registers D,E. It should be noted here that the data is stable for Ta secs. The functionality is illustrated in
Figure 8. Standby Mode 2
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DATA Register
DATA Register
Channel
Channel
INT
INT
I
DD
I
Start SBM2
Start SBM1
DD
DATA – A0
DATA – A0
T
a
T
a
sec.
Table 33
sec.
ADC
is set to “1” and Mode Control Bits to “10” through SPI. In this mode the date rate is programmable
T
conv
ADC
T
conv
MCU
DATA – A1
T
T
INT
a
sec.
DATA – A1
T
Revision 3.4
a
sec.
I
T
V, I, T
conv
T
conv
MCU
DATA – A2
T
a
sec.
|I| > I Threshold
Figure 7
DATA – A2
T
a
Table 33
Figure
to ensure the overall low-power
sec.
T
conv
I
MCU
8.
is set to “1” and Mode Control
V, I, T
DATA – A3
T
T
INT
conv
MCU
DATA – A3
t
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