adv7322 Analog Devices, Inc., adv7322 Datasheet - Page 19

• Manufacturer Part Number: adv7322
• Description: Multiformat 11-bit Hdtv Video Encoder
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
Table 6. Pin Function Descriptions
Mnemonic
DGND
AGND
CLKIN_A
CLKIN_B
COMP1,
COMP2
DAC A
DAC B
DAC C
DAC D
DAC E
DAC F
P_HSYNC
P_VSYNC
P_BLANK
S_BLANK
S_HSYNC
S_VSYNC
Y7 to Y0
C7 to C0
S7 to S0
RESET
R
SCLK
SDA
ALSB
V
V
V
V
EXT_LF
RTC_SCR_TR
I
GND_IO
TEST0 to
TEST5
2
SET1
DD_IO
DD
AA
REF
C
, R
SET2
Input/Output
G
G
I
I
O
O
O
O
O
O
O
I
I
I
I/O
I/O
I/O
I
I
I
I
I
I
I/O
I
P
P
P
I/O
I
I
I
I
Digital Ground.
Analog Ground.
Pixel Clock Input for HD (74.25 MHz Only, PS Only (27 MHz), SD Only (27 MHz).
External Loop Filter for the Internal PLL.
Multifunctional Input. Real time control (RTC) input, timing reset input, subcarrier reset input.
Function
Pixel Clock Input. Requires a 27 MHz reference clock for progressive scan mode or a 74.25 MHz (74.1758
MHz) reference clock in HDTV mode. This clock is only used in dual modes.
Compensation Pin for DACs. Connect 0.1 µF capacitor from COMP pin to V
CVBS/Green/Y/Y Analog Output.
Chroma/Blue/U/Pb Analog Output.
Luma/Red/V/Pr Analog Output.
In SD Only Mode: CVBS/Green/Y Analog Output; in HD Only Mode and Simultaneous HD/SD Mode:
Y/Green [HD] Analog Output.
In SD Only Mode: Luma/Blue/U Analog Output; in HD Only Mode and Simultaneous HD/SD Mode: Pr/Red
Analog Output.
In SD Only Mode: Chroma/Red/V Analog Output; in HD Only Mode and Simultaneous HD/SD Mode:
Pb/Blue [HD] Analog Output.
Video Horizontal Sync Control Signal for HD in Simultaneous SD/HD Mode and HD Only Mode.
Video Vertical Sync Control Signal for HD in Simultaneous SD/HD Mode and HD Only Mode.
Video Blanking Control Signal for HD in Simultaneous SD/HD Mode and HD Only Mode.
Video Blanking Control Signal for SD Only.
Video Horizontal Sync Control Signal for SD Only.
Video Vertical Sync Control Signal for SD Only.
SD or Progressive Scan/HDTV Input Port for Y Data. Input port for interleaved progressive scan data. The
LSB is set up on Pin Y0.
Progressive Scan/HDTV Input Port 4:4:4 Input Mode. This port is used for the Cb [Blue/U] data. The LSB is
set up on Pin C0.
SD or Progressive Scan/HDTV Input Port for Cr [Red/V] data in 4:4:4 input mode. LSB is set up on Pin S0.
This input resets the on-chip timing generator and sets the ADV7322 into default register setting. RESET is
an active low signal.
A 3040 Ω resistor must be connected from this pin to AGND and is used to control the amplitudes of the
DAC outputs.
I
I
TTL Address Input. This signal sets up the LSB of the I
activated, which reduces noise on the I
Power Supply for Digital Inputs and Outputs.
Digital Power Supply.
Analog Power Supply.
Optional External Voltage Reference Input for DACs or Voltage Reference Output (1.235 V).
This input pin must be tied high (V
Digital Input/Output Ground.
Not used. Tie to DGND
2
2
C Port Serial Interface Clock Input.
C Port Serial Data Input/Output.
Rev. PrA | Page 19 of 88
DD_IO
) for the ADV7322 to interface over the I
2
C interface.
2
C address. When this pin is tied low, the I
AA
.
2
C port.
ADV7322
2
C filter is