xcr3128 Xilinx Corp., xcr3128 Datasheet - Page 6

• Manufacturer Part Number: xcr3128
• Description: Xcr3128 128 Macrocell Cpld
• Manufacturer: Xilinx Corp.

Figure 5: I
Table 1: I
JTAG Testing Capability
JTAG is the commonly-used acronym for the Boundary
Scan Test (BST) feature defined for integrated circuits by
IEEE Standard 1149.1. This standard defines input/output
pins, logic control functions, and commands which facilitate
both board and device level testing without the use of spe-
cialized test equipment. BST provides the ability to test the
external connections of a device, test the internal logic of
the device, and capture data from the device during normal
operation. BST provides a number of benefits in each of the
following areas:
• Testability
DS034 (v1.2) August 10, 2000
Frequency (MHz)
Typical I
- Allows testing of an unlimited number of
- Testability is designed in at the component level
- Enables desired signal levels to be set at specific
interconnects on the printed circuit board
pins (Preload)
CC
CC
CC
vs. Frequency (V
(mA)
R
vs. Frequency @ V
(mA)
I
CC
140
120
100
80
60
40
20
0
0
.03
0
CC
= 3.3V, 25°C)
CC
= 3.3V, 25°C
20
.06
1
www.xilinx.com
1-800-255-7778
FREQUENCY (MHz)
20
12
40
• Reliability
• Cost
The Xilinx XCR3128's JTAG interface includes a TAP Port
and a TAP Controller, both of which are defined by the IEEE
1149.1 JTAG Specification. As implemented in the Xilinx
-
-
-
-
-
-
-
-
Data from pin or core logic signals can be examined
during normal operation
Eliminates physical contacts common to existing test
fixtures (e.g., "bed-of-nails")
Degradation of test equipment is no longer a
concern
Facilitates the handling of smaller, surface-mount
components
Allows for testing when components exist on both
sides of the printed circuit board
Reduces/eliminates the need for expensive test
equipment
Reduces test preparation time
Reduces spare board inventories
40
24
60
XCR3128: 128 Macrocell CPLD
60
35
80
SP00471
80
46
100
100
63
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