ep2c35 Altera Corporation, ep2c35 Datasheet - Page 36

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ep2c35

Manufacturer Part Number
ep2c35
Description
Cyclone Ii Device Family Data Sheet
Manufacturer
Altera Corporation
Datasheet

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Global Clock Network & Phase-Locked Loops
Figure 2–15. LAB & I/O Clock Regions
2–24
Cyclone II Device Handbook, Volume 1
6
6
6
Cyclone Logic Array
LAB Row Clocks
LAB Row Clocks
LAB Row Clocks
labclk[5..0]
labclk[5..0]
labclk[5..0]
f
6
6
6
6
6
For more information on the global clock network and the clock control
block, see the PLLs in Cyclone II Devices chapter in Volume 1 of the
Cyclone II Device Handbook.
Column I/O Clock Region
Column I/O Clock Region
IO_CLK[5..0]
IO_CLK[5..0]
8 or 16
Global Clock
Network
6
6
6
LAB Row Clocks
LAB Row Clocks
LAB Row Clocks
labclk[5..0]
labclk[5..0]
labclk[5..0]
6
6
6
Altera Corporation
I/O Clock Regions
I/O Clock Regions
February 2007
Row I/O Clock
Region
IO_CLK[5..0]

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