ez80l92 ZiLOG Semiconductor, ez80l92 Datasheet - Page 220
ez80l92
Manufacturer Part Number
ez80l92
Description
Ez80acclaim Flash Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.EZ80L92.pdf
(231 pages)
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Table 125. GPIO Port Output Timing
Table 126. Bus Acknowledge Timing
Table 127. PHI System Clock Timing
PS013014-0107
Parameter
T
T
Parameter
T
T
Parameter
T
T
1
2
1
2
1
2
External Bus Acknowledge Timing
External System Clock Driver (PHI) Timing
Description
Clock Rise to Port Output Valid Delay
Clock Rise to Port Output Hold Time
Description
Clock Rise to BUSACK Assertion Delay
Clock Rise to BUSACK Deassertion Delay
Description
Clock Rise to PHI Rise
Clock Fall to PHI Fall
Table 126
Table 127
als to synchronize with the internal system clock driver on the eZ80L92 MCU.
provides information about the external bus acknowledge timing.
lists timing information for the PHI pin. The PHI pin allows external peripher-
Min
Min
Min
2.0
2.8
2.5
1.6
1.8
—
20 MHz (ns)
20 MHz (ns)
20 MHz (ns)
Max
Max
Max
9.3
9.3
6.5
4.6
4.3
—
Product Specification
Min
Min
Min
2.0
2.8
2.5
1.6
1.8
—
50 MHz (ns)
50 MHz (ns)
50 MHz (ns)
AC Characteristics
Max
Max
Max
9.3
9.3
6.5
4.6
4.3
—
214