mm908e622 Freescale Semiconductor, Inc, mm908e622 Datasheet - Page 3

• Manufacturer Part Number: mm908e622
• Description: Mm908e622 Integrated Quad Half-bridge, Triple High-side And Ec Glass Driver With Embedded Mcu And Lin For High End Mirror
• Manufacturer: Freescale Semiconductor, Inc

Table 1. Terminal Definitions
Analog Integrated Circuit Device Data
Freescale Semiconductor
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View of Package
Analog
Analog
MCU /
MCU /
MCU
MCU
MCU
MCU
MCU
A functional description of each terminal can be found in the
Die
Terminal
10
44
1
2
3
4
5
6
7
8
9
(PTD0/TACH0/BEMF -> PWM)
(PTD0/TACH0/BEMF
(PTE1/RXD <- RXD)
Terminal Name
PTD1/TACH1
PTC2/MCLK
PTC4/OSC1
PTC3/OSC2
PTB5/AD5
PTB4/AD4
PTB3/AD3
-> PWM)
RST
IRQ
PTD1/TACH1
PTC2/MCLK
PTC4/OSC1
PTC3/OSC2
TESTMODE
PTB5/AD5
PTB4/AD4
PTB3/AD3
VSUP1
VSUP2
VSUP3
A0CST
RST_A
IRQ_A
GND1
GND2
GND3
ECR
HB4
HB3
HB2
RST
IRQ
LIN
TERMINAL CONNECTIONS
EC
External Interrupt
A0
LIN Transceiver
External Reset
Formal Name
PWM signal
Figure 3. Terminal Connections
Port D I/Os
Port C I/Os
Port B I/Os
Output
Input
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
Functional Terminal Description
These terminals are special-function, bidirectional I/O port terminals
that are shared with other functional modules in the MCU.
These terminals are special-function, bidirectional I/O port terminals
that are shared with other functional modules in the MCU.
This terminal is an asynchronous external interrupt input terminal.
This terminal is bidirectional, allowing a reset of the entire system. It is
driven low when any internal reset source is asserted.
This terminal is the PWM signal test terminal. It internally connects the
MCU PTD0/TACH0 terminal with the Analog die PWM input.
Note: Do not connect in the application.
This terminal is a special-function, bidirectional I/O port terminal that is
shared with other functional modules in the MCU.
This terminal is the LIN Transceiver output test terminal. It internally
connects the MCU PTE1/RXD terminal with the Analog die LIN
transceiver output terminal RXD.
Note: Do not connect in the application.
Exposed
Pad
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
Definition
PTA0/KBD0
PTA1/KBD1
PTA2/KBD2
FLSVPP
PTA3/KBD3
PTA4/KBD4
VDDA/VREFH
EVDD
EVSS
VSSA/VREFL
(PTE1/RXD <- RXD)
VSS
VDD
HVDD
L0
H0
HS3
VSUP8
HS2
VSUP7
HS1b
HS1a
VSUP6
VSUP5
GND4
HB1
VSUP4
section beginning on page 21.
Terminal Connections
908E622
3