ade7166 Analog Devices, Inc., ade7166 Datasheet - Page 43

• Manufacturer Part Number: ade7166
• Description: Single-phase Energy Measurement Ic With 8052 Mcu, Rtc, And Lcd Driver
• Manufacturer: Analog Devices, Inc.

Bit
3 to 2
1 to 0
1
Table 36. ACCMODE Register (0x0F)
Bit
7
6
5
4
3
2
1
0
1
2
Table 37. GAIN Register (0x1B)
Bit
7 to 5
4
3
This function is not available in the ADE7566 and ADE7166.
This function is not available in the ADE7566 and ADE7569.
This function is not available in the ADE7566 and ADE7166.
Mnemonic
ICHANNEL
FAULTSIGN
VARSIGN
APSIGN
ABSVARM
SAVARM
POAM
ABSAM
Mnemonic
PGA2[2:0]
Reserved
CFSIGN_OPT
Mnemonic
VARNOLOAD[1:0]
APNOLOAD[1:0]
2
2
2
1
1
Default
0
0
0
0
0
0
0
0
Default
000
0
0
1
Default
00
00
Description
Configuration bit to select the event that triggers a reactive power sign interrupt. If set to 0, VARSIGN
interrupt occurs when reactive power changes from positive to negative. If set to 1, VARSIGN
interrupt occurs when reactive power changes from negative to positive.
Configuration bit to select event that triggers an active power sign interrupt. If set to 0, APSIGN
interrupt occurs when active power changes from positive to negative. If set to 1, APSIGN interrupt
occurs when active power changes from negative to positive.
Logic 1 enables absolute value accumulation of reactive power in energy register and pulse output.
Logic 1 enables reactive power accumulation depending on the sign of the active power. If active
power is positive, VAR is accumulated as it is. If active power is negative, the sign of the VAR is
reversed for the accumulation. This accumulation mode affects both the VAR registers (VARHR,
RVARHR, LVARHR) and the pulse output when connected to VAR.
Logic 1 enables positive-only accumulation of active power in energy register and pulse output.
Logic 1 enables absolute value accumulation of active power in energy register and pulse output.
Description
These bits define the voltage channel input gain.
PGA2[2:0]
000
001
010
011
100
Reserved.
This bit defines where the CF change of sign detection (APSIGN or VARSIGN) is implemented.
CFSIGN_OPT
0
1
This bit indicates the current channel used to measure energy in antitampering mode.
0 – Channel A
1 – Channel B
Configuration bit to select the event that triggers a fault interrupt.
0 – FAULT interrupt occurs when part enters fault mode
1 – FAULT interrupt occurs when part enters normal mode
Description
Reactive Power No-Load Threshold.
VARNOLOAD[1:0]
00
01
10
11
Active Power No-Load Threshold.
APNOLOAD[1:0]
00
01
10
11
Rev. A | Page 43 of 144
Result
No-load detection disabled
No-load detection enabled with threshold = 0.015% of full scale
No-load detection enabled with threshold = 0.0075% of full scale
No-load detection enabled with threshold = 0.0037% of full scale
Result
No-load detection disabled
No-load detection enabled with threshold = 0.015% of full scale
No-load detection enabled with threshold = 0.0075% of full scale
No-load detection enabled with threshold = 0.0037% of full scale
ADE7566/ADE7569/ADE7166/ADE7169
Result
Gain = 1
Gain = 2
Gain = 4
Gain = 8
Gain = 16
Result
Filtered power signal
On a per CF pulse basis
2