ade7880 Analog Devices, Inc., ade7880 Datasheet - Page 29

• Manufacturer Part Number: ade7880
• Description: Polyphase Multifunction Energy Metering Ic With Harmonic Monitoring
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
good resolution of the ZX detection. Figure 25 shows how the
zero-crossing signal is detected.
To provide further protection from noise, input signals to the
voltage channel with amplitude lower than 10% of full scale do
not generate zero-crossing events at all. The Current Channel ZX
detection circuit is active for all input signals independent of their
amplitudes.
The ADE7880 contains six zero-crossing detection circuits, one
for each phase voltage and current channel. Each circuit drives
one flag in the STATUS1 register. If a circuit placed in the Phase
A voltage channel detects one zero-crossing event, Bit 9 (ZXVA)
in the STATUS1 register is set to 1.
Similarly, the Phase B voltage circuit drives Bit 10 (ZXVB), the
Phase C voltage circuit drives Bit 11 (ZXVC), and circuits placed
in the current channel drive Bit 12 (ZXIA), Bit 13 (ZXIB), and
Bit 14 (ZXIC) in the STATUS1 register. If a ZX detection bit is
set in the MASK1 register, the IRQ1 interrupt pin is driven low
and the corresponding status flag is set to 1. The status bit is
cleared and the
register with the status bit set to 1.
Zero-Crossing Timeout
Every zero-crossing detection circuit has an associated timeout
register. This register is loaded with the value written into the
16-bit ZXTOUT register and is decremented (1 LSB) every
62.5 µs (16 kHz clock). The register is reset to the ZXTOUT
value every time a zero crossing is detected. The default value of
this register is 0xFFFF. If the timeout register decrements to 0
before a zero crossing is detected, one of Bits[8:3] of the
STATUS1 register is set to 1. Bit 3 (ZXTOVA), Bit 4 (ZXTOVB),
and Bit 5 (ZXTOVC) in the STATUS1 register refer to Phase A,
Phase B, and Phase C of the voltage channel; Bit 6 (ZXTOIA),
Bit 7 (ZXTOIB), and Bit 8 (ZXTOIC) in the STATUS1 register
refer to Phase A, Phase B, and Phase C of the current channel.
If a ZXTOIx or ZXTOVx bit is set in the MASK1 register, the
IRQ1 interrupt pin is driven low when the corresponding status bit
is set to 1. The status bit is cleared and the
high by writing to the STATUS1 register with the status bit set to 1.
VA, VB, VC
IA, IB, IC
Figure 25. Zero-Crossing Detection on Voltage and Current Channels
or
PGA
IRQ1 pin is set to high by writing to the STATUS1
REFERENCE
IA, IB, IC, IN
VA, VB, VC
ADC
or
0.855
DSP
GAIN[23:0]
0V
1
ZX
CONFIG3[0]
HPFEN bit
39.6 deg or 2.2msec
HPF
IRQ1 pin is returned to
ZX
@ 50Hz
ZX
LPF1
LPF1 output
ZX
DETECTION
Rev. PrE | Page 29 of 103
ZX
The resolution of the ZXOUT register is 62.5 µs (16 kHz clock)
per LSB. Thus, the maximum timeout period for an interrupt is
4.096 sec: 2
Figure 26 shows the mechanism of the zero-crossing timeout
detection when the voltage or the current signal stays at a fixed
dc level for more than 62.5 µs × ZXTOUT µs.
Phase Sequence Detection
The ADE7880 has on-chip phase sequence error detection
circuits. This detection works on phase voltages and considers
only the zero crossings determined by their negative-to-positive
transitions. The regular succession of these zero-crossing events is
Phase A followed by Phase B followed by Phase C (see Figure 28). If
the sequence of zero-crossing events is, instead, Phase A followed
by Phase C followed by Phase B, then Bit 19 (SEQERR) in the
STATUS1 register is set.
If Bit 19 (SEQERR) in the MASK1 register is set to 1 and a
phase sequence error event is triggered, the IRQ1 interrupt pin
is driven low. The status bit is cleared and the
high by writing to the STATUS1 register with the Status Bit 19
(SEQERR) set to 1.
The phase sequence error detection circuit is functional only
when the ADE7880 is connected in a 3-phase, 4-wire, three voltage
sensors configuration (Bits[5:4], CONSEL[1:0] in the ACCMODE
register, set to 00). In all other configurations, only two voltage
sensors are used; therefore, it is not recommended to use the
detection circuit. In these cases, use the time intervals between
phase voltages to analyze the phase sequence (see the
Interval Between Phases section for details).
Figure 27 presents the case in which Phase A voltage is not
followed by Phase B voltage but by Phase C voltage. Every time
a negative-to-positive zero crossing occurs, Bit 19 (SEQERR) in
the STATUS1 register is set to 1 because such zero crossings on
STATUS1[31:0], x = V, A
IRQ1 INTERRUPT PIN
ZXZOxy FLAG IN
REGISTER VALUE
16-BIT INTERNAL
CURRENT
y = A, B, C
VOLTAGE
SIGNAL
OR
16
/16 kHz.
Figure 26. Zero-Crossing Timeout Detection
ZXTOUT
0V
IRQ1 pin is set
ADE7880
Time