mc68hc908gr8a Freescale Semiconductor, Inc, mc68hc908gr8a Datasheet - Page 235
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mc68hc908gr8a
Manufacturer Part Number
mc68hc908gr8a
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC908GR8A.pdf
(260 pages)
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Freescale Semiconductor
V
I/O ports Hi-Z leakage current
Input current
Pullup resistors (as input only)
Capacitance
Monitor mode entry voltage
Low-voltage inhibit, trip falling voltage – target
Low-voltage inhibit, trip rising voltage – target
Low-voltage inhibit reset/recover hysteresis – target
POR rearm voltage
POR reset voltage
POR rise time ramp rate
1. V
2. Typical values reflect average measurements at midpoint of voltage range, 25 °C only.
3. Run (operating) I
4. Wait I
5. Stop I
6. Stop I
7. Pullups and pulldowns are disabled.
8. Maximum is highest voltage that POR is guaranteed.
9. Maximum is highest voltage that POR is possible.
10. If minimum V
DD
Run
Wait
Stop
Stop with TBM enabled
Stop with LVI and TBM enabled
Stop with LVI
Ports PTA3/KBD37–PTA0/KBD0, PTC1–PTC0,
Ports (as input or output)
(V
loads. Less than 100 pF on all outputs. C
affects run I
than 100 pF on all outputs. C
I
No dc loads. Less than 100 pF on all outputs. All inputs configured as inputs.
V
PTD6/T2CH0–PTD0/SS
DD
TRIPF
DD
DD
supply current
(3)
. Measured with PLL and LVI enabled.
(4)
(5)
= 3.0 Vdc ± 10%, V
is reached.
DD
DD
DD
+
measured using external square wave clock source (f
is measured with OSC1 = V
with TBM enabled is measured using an external crystal clock source (f
V
HYS
DD
DD
. Measured with all modules enabled.
(9)
=
(8)
DD
is not reached before the internal POR reset is released, RST must be driven low externally until minimum
Characteristic
V
TRIPR
measured using external square wave clock source (f
(10)
(6)
SS
)
(7)
= 0 Vdc, T
MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5
L
(6)
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects wait
(1)
SS
A
.
= T
L
L
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly
to T
H
, unless otherwise noted
V
Symbol
V
V
V
PORRST
R
C
V
V
osc
TRIPR
R
TRIPF
C
I
POR
I
HYS
POR
I
Out
DD
TST
In
IL
PU
In
= 16.4 MHz). All inputs 0.2 V from rail. No dc loads. Less
osc
V
DD
2.35
2.45
0.02
= 16.4 MHz). All inputs 0.2 V from rail. No dc
Min
20
—
—
—
—
—
—
—
—
—
—
—
0
0
+2.5
OSC
= 4 MHz). All inputs 0.2 V from rail.
3.0 V DC Electrical Characteristics
Typ
1.65
2.60
2.66
300
500
200
700
4.5
10
45
60
—
—
—
—
—
—
1
(2)
Max
2.70
2.80
500
700
300
100
800
8.5
10
65
12
—
—
8
4
6
1
8
V/ms
Unit
mA
mA
mV
mV
mV
μA
μA
μA
μA
μA
μA
kΩ
pF
V
V
V
235
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