mc68hc908jl16 Freescale Semiconductor, Inc, mc68hc908jl16 Datasheet - Page 53

• Manufacturer Part Number: mc68hc908jl16
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Interrupts are latched, and arbitration is performed in the SIM at the start of interrupt processing. The
arbitration result is a constant that the CPU uses to determine which vector to fetch. Once an interrupt is
latched by the SIM, no other interrupt can take precedence, regardless of priority, until the latched
interrupt is serviced (or the I bit is cleared).
At the beginning of an interrupt, the CPU saves the CPU register contents on the stack and sets the
interrupt mask (I bit) to prevent additional interrupts. At the end of an interrupt, the RTI instruction recovers
the CPU register contents from the stack so that normal processing can resume.
interrupt entry timing.
4.5.1.1 Hardware Interrupts
A hardware interrupt does not stop the current instruction. Processing of a hardware interrupt begins after
completion of the current instruction. When the current instruction is complete, the SIM checks all pending
hardware interrupts. If interrupts are not masked (I bit clear in the condition code register), and if the
corresponding interrupt enable bit is set, the SIM proceeds with interrupt processing; otherwise, the next
instruction is fetched and executed.
Freescale Semiconductor
INTERRUPT
INTERRUPT
MODULE
MODULE
I BIT
I BIT
R/W
R/W
IDB
IDB
IAB
IAB
DUMMY
Figure 4-10
DUMMY
SP – 4
SP
PC – 1[7:0] PC – 1[15:8]
CCR
shows interrupt recovery timing.
Figure 4-10. Interrupt Recovery
MC68HC908JL16 Data Sheet, Rev. 1.1
SP – 1
SP – 3
Figure 4-9
A
SP – 2
SP – 2
.
X
X
Interrupt Entry
SP – 3
SP – 1
PC – 1[15:8] PC – 1[7:0] OPCODE
A
SP – 4
SP
CCR
VECT H
PC
V DATA H
VECT L START ADDR
PC + 1
V DATA L
OPERAND
Figure 4-9
Exception Control
OPCODE
shows
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