mc68hc908rf2 Freescale Semiconductor, Inc, mc68hc908rf2 Datasheet - Page 105

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mc68hc908rf2

Manufacturer Part Number
mc68hc908rf2
Description
M68hc08 Microcontrollers Microcontroller / Transmitter
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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8.4 LVI Status Register
8.5 LVI Interrupts
8.6 Low-Power Modes
8.6.1 Wait Mode
8.6.2 Stop Mode
MC68HC908RF2 — Rev. 4.0
MOTOROLA
NOTE:
The LVI status register flags V
LVIOUT — LVI Output Bit
LOWV— LVI Low Indicator Bit
The LVI module does not generate CPU interrupt requests.
The STOP and WAIT instructions put the MCU in low power-consumption standby
modes.
The LVI module remains active in wait mode. The LVI module can generate a reset
if a V
The LVI can be enabled or disabled in stop mode by setting the LVISTOP bit in the
CONFIG register. (See
To minimize STOP I
Address: $FE0F
The read-only flag becomes set when the V
voltage for 32 to 40 CGMXCLK cycles. Reset clears the LVIOUT bit.
This read-only flag becomes set when the LVI is detecting V
the V
Reset:
Read:
Write:
DD
Freescale Semiconductor, Inc.
LVS
voltage below the V
For More Information On This Product,
LVIOUT
threshold.
Bit 7
0
Go to: www.freescale.com
= Unimplemented
Low-Voltage Inhibit (LVI)
Figure 8-2. LVI Status Register (LVISR)
DD,
6
0
0
Section 3. Configuration Register
disable the LVI in stop mode.
LVR
LOWV
DD
5
0
voltage is detected.
voltages below the V
4
0
0
DD
3
0
0
voltage falls below the V
LVR
2
0
0
and V
Low-Voltage Inhibit (LVI)
(CONFIG).)
DD
LVI Status Register
LVS
voltage below
1
0
0
levels.
Data Sheet
LVR
Bit 0
0
0
105

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