mc68hc908rf2 Freescale Semiconductor, Inc, mc68hc908rf2 Datasheet - Page 115

• Manufacturer Part Number: mc68hc908rf2
• Description: M68hc08 Microcontrollers Microcontroller / Transmitter
• Manufacturer: Freescale Semiconductor, Inc

10.2 SIM Bus Clock Control and Generation
10.2.1 Bus Timing
10.2.2 Clock Startup from POR or LVI Reset
10.2.3 Clocks in Stop Mode and Wait Mode
MC68HC908RF2 — Rev. 4.0
MOTOROLA
The bus clock generator provides system clock signals for the CPU and peripherals
on the MCU. The system clocks are generated from an incoming clock, CGMOUT,
as shown in
from the internal clock generator (ICG) module.
In user mode, the internal bus frequency is either the crystal oscillator output
(ECLK) divided by four or the ICG output (ICLK) divided by four.
When the power-on reset (POR) module or the low-voltage inhibit (LVI) module
generates a reset, the clocks to the CPU and peripherals are inactive and held in
an inactive phase until after 4096 CGMXCLK cycles. The RST pin is driven low by
the SIM during this entire period. The bus clocks start upon completion of the
timeout.
Upon exit from stop mode by an interrupt, break, or reset, the SIM allows
CGMXCLK to clock the SIM counter. The CPU and peripheral clocks do not
become active until after the stop delay timeout. This timeout is selectable as 4096
or 32 CGMXCLK cycles. (See
In wait mode, the CPU clocks are inactive. Refer to the wait mode subsection of
each module to see if the module is active or inactive in wait mode. Some modules
can be programmed to be active in wait mode.
GENERATOR
ICG
Freescale Semiconductor, Inc.
For More Information On This Product,
ECLK
ICLK
Figure
System Integration Module (SIM)
MONITOR MODE
Go to: www.freescale.com
SELECT
CIRCUIT
CLOCK
USER MODE
10-3. This clock can come from either an external oscillator or
CS
ICG
PTB3
Figure 10-3. ICG Clock Signals
÷ 2
10.6.2 Stop
A
B S*
*When S = 1,
CGMOUT = B
Mode.)
CGMXCLK
CGMOUT
SIM Bus Clock Control and Generation
System Integration Module (SIM)
÷ 2
SIM COUNTER
SIM
GENERATORS
BUS CLOCK
Data Sheet
115