mc68hc908sr12 Freescale Semiconductor, Inc, mc68hc908sr12 Datasheet - Page 246

• Manufacturer Part Number: mc68hc908sr12
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Analog-to-Digital Converter (ADC)
15.8.3 ADC Data Register 0 (ADRH0 and ADRL0)
Data Sheet
246
Addr.
Addr.
$005A
$005A
$0059
$0059
ADC Data Register High 0
ADC Data Register High 0
ADC Data Register Low 0
ADC Data Register Low 0
Register Name
Register Name
Figure 15-5. ADRH0 and ADRL0 in 8-Bit Truncated Mode
Figure 15-6. ADRH0 and ADRL0 in Right Justified Mode
(ADRH0)
(ADRH0)
(ADRL0)
(ADRL0)
The ADC data register 0 consist of a pair of 8-bit registers: high byte
(ADRH0), and low byte (ADRL0). This pair form a 16-bit register to store
the 10-bit ADC result for the selected ADC result justification mode.
In 8-bit truncated mode, the ADRL0 holds the eight most significant bits
(MSBs) of the 10-bit result. The ADRL0 is updated each time an ADC
conversion completes. In 8-bit truncated mode, ADRL0 contains no
interlocking with ADRH0. (See
Bit Truncated
In right justified mode the ADRH0 holds the two MSBs, and the ADRL0
holds the eight least significant bits (LSBs), of the 10-bit result. ADRH0
and ADRL0 are updated each time a single channel ADC conversion
completes. Reading ADRH0 latches the contents of ADRL0. Until
ADRL0 is read all subsequent ADC results will be lost.
(See
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Figure 15-6 . ADRH0 and ADRL0 in Right Justified
Bit 7
Bit 7
AD9
AD7
Analog-to-Digital Converter (ADC)
R
R
R
R
0
0
0
0
0
0
Mode.)
AD8
AD6
R
R
R
R
6
0
0
0
6
0
0
0
AD7
AD5
R
R
R
R
5
0
0
0
5
0
0
0
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
Figure 15-5 . ADRH0 and ADRL0 in 8-
AD6
AD4
R
R
R
R
4
0
0
0
4
0
0
0
AD5
AD3
R
R
R
R
3
0
0
0
3
0
0
0
AD4
AD2
Freescale Semiconductor
R
R
R
R
2
0
0
0
2
0
0
0
AD3
AD9
AD1
R
R
R
R
1
0
0
0
1
0
0
Mode.)
Bit 0
Bit 0
AD2
AD8
AD0
R
R
R
R
0
0
0
0
0