mc68hc908sr12 Freescale Semiconductor, Inc, mc68hc908sr12 Datasheet - Page 360
mc68hc908sr12
Manufacturer Part Number
mc68hc908sr12
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC908SR12.pdf
(404 pages)
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Low-Voltage Inhibit (LVI)
22.4.2 Forced Reset Operation
22.4.3 Voltage Hysteresis Protection
22.4.4 LVI Trip Selection
Data Sheet
360
NOTE:
In applications that require V
enabling LVI resets allows the LVI module to reset the MCU when V
falls below the V
the LVIPWRD and LVIRSTD bits must be at logic 0 to enable the LVI
module and to enable LVI resets.
Once the LVI has triggered (by having V
will maintain a reset condition until V
voltage, V
continually entering and exiting reset if V
V
The LVI5OR3 bit in the CONFIG1 register selects whether the LVI is
configured for 5V or 3V protection.
The MCU is guaranteed to operate at a minimum supply voltage. The trip
point (V
(See
voltages.)
TRIPF
Section 24. Electrical Specifications
. V
TRIPF
TRIPR
TRIPR
Low-Voltage Inhibit (LVI)
[5 V] or V
. This prevents a condition in which the MCU is
is greater than V
TRIPF
level. In the configuration register 1 (CONFIG1),
TRIPF
DD
[3 V]) may be lower than this.
MC68HC908SR12•MC68HC08SR12 — Rev. 5.0
to remain above the V
TRIPF
DD
by the hysteresis voltage, V
rises above the rising trip point
DD
DD
fall below V
is approximately equal to
for the actual trip point
Freescale Semiconductor
TRIPF
TRIPF
level,
), the LVI
HYS
DD
.
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