mc68hc908bd48 Freescale Semiconductor, Inc, mc68hc908bd48 Datasheet - Page 216

• Manufacturer Part Number: mc68hc908bd48
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Sync Processor
16.5.4 Clamp Pulse Output
Data Sheet
216
When the SOUT bit is set, the HSYNCO output is a free-running pulse
with 2µs width. Both HSYNCO and VSYNCO outputs are negative
polarity, with frequencies selected by the H & V Sync Output Control
Register (HVOCR).
When the CLAMPOE bit in SPIOCR is set to "1", a clamp signal is output
on the CLAMP pin. This clamp pulse is triggered either on the leading
edge or the trailing edge of HSYNC, controlled by BPOR bit, with the
polarity controlled by the COINV bit. See
Output
(BPOR = 0)
(BPOR = 1)
(BPOR = 0)
(BPOR = 1)
ATPOL
(HPOL = 1)
(HPOL = 0)
HSYNC
HSYNC
CLAMP
CLAMP
CLAMP
CLAMP
X
0
0
1
1
Timing.
SOUT
Figure 16-2. Clamp Pulse Output Timing
1
0
0
0
0
Sync Processor
Table 16-4. Sync Output Polarity
VINVO
HINVO
or
X
0
1
0
1
Pulse width = 0.33~2.1µs
Pulse width = 0.33~2.1µs
Free-running pulse with negative polarity
Same polarity as sync input
Inverted polarity of sync input
Negative polarity sync output
Positive polarity sync output
Pulse width = 0.33~2.1µs
Pulse width = 0.33~2.1µs
Figure 16-2 . Clamp Pulse
VSYNCO/HSYNCO
Sync Outputs:
MC68HC908BD48
Freescale Semiconductor
—
Rev. 2.1