mc68hc908bd48 Freescale Semiconductor, Inc, mc68hc908bd48 Datasheet - Page 245

no-image

mc68hc908bd48

Manufacturer Part Number
mc68hc908bd48
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mc68hc908bd48IB
Manufacturer:
MOTOROLA
Quantity:
42
Part Number:
mc68hc908bd48IB
Manufacturer:
freescaie
Quantity:
109
Part Number:
mc68hc908bd48IFB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
17.6.3 Port D Options
MC68HC908BD48
Freescale Semiconductor
Rev. 2.1
Address:
Reset:
The port D configuration register (PDCR) selects the port D pins for
module function or as standard I/O function.
IICDATE — MMIIC Data Pin Enable
IICSCLE — MMIIC Clock Pin Enable
CLAMP — CLAMP Pin Enable
DDCSCLE — DDC Clock Pin Enable
Read:
Write:
This bit is set to configure the PTD6/IICSDA pin for IICSDA function.
Reset clears this bit.
This bit is set to configure the PTD5/IICSCL pin for IICSCL function.
Reset clears this bit.
This bit is set to configure the PTD4/CLAMP pin for sync processor
clamp pulse output. Reset clears this bit.
This bit is set to configure the PTD3/DDCSCL pin for DDCSCL
function. Reset clears this bit.
1 = PTD6/IICSDA pin configured as IICSDA pin
0 = PTD6/IICSDA pin configured as standard I/O pin
1 = PTD5/IICSCL pin configured as IICSCL pin
0 = PTD5/IICSCL pin configured as standard I/O pin
1 = PTD4/CLAMP pin configured as CLAMP pin
0 = PTD4/CLAMP pin configured as standard I/O pin
1 = PTD3/DDCSCL pin configured as DDCSCL pin
0 = PTD3/DDCSCL pin configured as standard I/O port
Figure 17-15. Port D Configuration Register (PDCR)
$0049
Bit 7
0
0
Input/Output (I/O) Ports
= Unimplemented
IICDATE
6
0
IICSCLE
5
0
CLAMPE
4
0
DDCSCLE DDCDATE
3
0
2
0
Input/Output (I/O) Ports
USBD–E
1
0
Data Sheet
USBD+E
Bit 0
0
245

Related parts for mc68hc908bd48