mc68hc916y3 Freescale Semiconductor, Inc, mc68hc916y3 Datasheet - Page 366

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mc68hc916y3

Manufacturer Part Number
mc68hc916y3
Description
Mc68hc16y3 16 Bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
A-40
MOTOROLA
Num
NOTES:
1
2
3
4
5
6
7
8
9
1. At V
2. 8-bit absolute error of 1 count (20 mV) includes 1/2 count (10 mV) inherent quantization error and 1/2 count
3. Conversion accuracy varies with f
4. 10-bit absolute error of 2.5 counts (12.5 mV) includes 1/2 count (2.5 mV) inherent quantization error and 2
5. Maximum source impedance is application-dependent. Error resulting from pin leakage depends on junction
Error from junction leakage is a function of external source impedance and input leakage current. Expected
where I
(10 mV) circuit (differential, integral, and offset) error.
sumes that minimum sample time (2 ADC Clocks) is selected.
counts (10 mV) circuit (differential, integral, and offset) error.
leakage into the pin and on leakage due to charge-sharing with internal capacitance.
error in result value due to junction leakage is expressed in voltage (V
Charge-sharing leakage is a function of input source impedance, conversion rate, change in voltage between
successive conversions, and the size of the decoupling capacitor used. Error levels are best determined em-
pirically. In general, continuous conversion of the same channel may not be compatible with high source im-
pedance.
8-bit Resolution
8-bit Differential Nonlinearity
8-bit Integral Nonlinearity
8-bit Absolute Error
10-bit Resolution
10-bit Differential Nonlinearity
10-bit Integral Nonlinearity
10-bit Absolute Error
Source Impedance at Input
RH
OFF
–V
RL
Table A-15 ADC Conversion Characteristics (Operating)
is a function of operating temperature, as shown in Table A-13.
= 5.12 V, one 10-bit count = 5 mV and one 8-bit count = 20 mV.
1
Parameter
1
(V
0.5 MHz
2
3,4
DD
Freescale Semiconductor, Inc.
and V
For More Information On This Product,
3
5
3
DDA
f
ADCLK
ADCLK
= 5.0 Vdc
Go to: www.freescale.com
rate. Reduced conversion accuracy occurs at maximum f
1.0 MHz, 2 clock input sample time)
V
ERRJ
Symbol
1 Count
1 Count
5%, V
DNL
DNL
INL
INL
AE
AE
R
S
=
R
SS
S
= 0 Vdc, T
I
OFF
–0.5
–0.5
–2.0
–2.5
Min
–1
–1
A
ERRJ
= T
):
L
Typical
to T
20
20
5
H
,
MC68HC16Y3/916Y3
USER’S MANUAL
Max
0.5
0.5
2.0
2.5
1
1
ADCLK
Counts
Counts
Counts
Counts
Counts
Counts
Unit
mV
mV
k
. As-

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